Other Parts Discussed in Thread: MSP430F1232, MSP430F5437, MSP430F5438A, MSP430F5418, MSP430F5438
Problem: Boostrap loader (BSL) does not work as documented. Sending the synchronization characeter (0x80) does not produce the expected response. |
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Steps Needed to Recreate the Problem: Our project is critically halted due to this problem. We need a reply extremely urgently. Our previous products used the MSP430F1232. We have full experience and success with that part for all stages of development (which included a custom PCB that used the BSL). Our new PCB uses the MSP430F5437. However, with the new IC, we cannot program the part. After days of snooping with the oscilloscope, we can describe the problem with great accuracy. The CPU is powered by 2.80V. VCORE is externally measured at 1.87V with a 470pF bypass capacitor (also, there are 1uF bypass caps on 2.8V Vcc). BSL-RX (TA0.1) is driven high. TCK floats. All other JTAG pins float. We then apply the sequence to enter bootloader mode on TEST (71) and RESET (76) (two rising edges on TEST while RESET is low, and RESET goes high when TEST is high). We know that we are in bootloader mode because after the bootloader entry sequence, the MSP430 drives BSLTX TA0.0 (18) HIGH. Then, we transmit a synchronization character (0x80). Given that the baud rate is 9600bps, with 8 data bits, 1 stop bit and even parity, the synchronization character ends up being a low pulse of 833us duration, confirmed by the oscilloscope. At this point, there is no response from the device; a DATA_ACK is expected, but none is received. No matter how many times we transmit the 0x80 character, no response is received. As mentioned, the 0x80 character consists of a low pulse of 833us duration. If we artificially extend that to 888us or longer, then the device responds with a 0x51 character (error). This behaviour is completely consistent. Any low pulse less than 888us produces no response. Any low pulse longer than 888us produces a response of 0x51. The response comes at 9600 baud. We have tested numerous identical circuits and all produce the same behaviour. As such, we are unable to load any programs into the MSP430F5437, and our project is halted. The documentation on the bootloader for the MSP430F5xx is extremely sparse. The documentation erroneously states that the TCK pin is the one used to enter bootloader mode. However actually it is the TEST pin. Further, the bootloader entry sequence is vague due to the confusion between TCK and TEST. We have found that different sequences can cause entry into bootloader mode. We would like the official story. Also the ideal VCORE capacitance value is ambiguous; we have heard 470pF and 470nF. |