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MSP430F5438 BSL Problem

Riley Pack
Prodigy 40 points
Other Parts Discussed in Thread: MSP430F5438, MSP430F5438A

I am just getting acquainted with the MSP architecture and tried to add BSL support to a board I am working on based around the F5438.  It uses two pushbuttons to generate the signals on RST and TEST to put the chip in BSL mode, which I believe is successful because TA0.0 transitions from low to high when the given sequence is generated.  However, when I send 0x80 over the UART to TA0.1, no ACK is sent back.  My UART settings are 9600 baud, even parity, 8 data bits and 1 stop bit.  Am I missing something?

  • 0
    Guru 58965 points

    Is your UART (outside F5438) using 3.3V logic?

    1) Connect and setup that UART first. TXD signal should be high (inactive).

    2) Taggle TEST pin a few times and release RST pin to start F5438 BSL.

    3) After RST is released, wait ~1 msec, then send 0x80 via your TXD.

    4) Clear RXD error flags and data buffer immediately.

    4) Wait for ACK at RXD

  • 0
    Prodigy 40 points

    Yeah the UART is going through a transceiver chip.  The RX line is currently hooked up to TA0.1 and is idle high like it's supposed to.  Because we used buttons to implement this, we can't just wait 1 ms, is there a maximum time that the chip will wait before receiving a sync and then it will just become non-responsive?

  • 0 in reply to Riley Pack
    Guru 58965 points

    A transceiver chip? That does not sound right.

    "Transceiver chip" usually convert levels to +10V and -10V (RS232 etc.). The logic levels of TA0.0 and TA0.1 are 0.0V and +3,3V. They can be connected directly to another UART (outside of F5438).

    Beside logic levels, the point is:

    TA0.1 must be driven high by the outside circuit before you tell F5438 to do BSL

    F5438 will drive TA0.0 high once F6438 starts BSL

    TA0.1 can start to send Sync Byte (0x80 @9600b/s,8-e-1) after a short delay of ~1ms to indefinite.

    At this time, the external UART may have already received garbage from TA0.0. Thus you should clear them immediately and then start to wait for ACK byte.

     

  • 0 in reply to old_cow_yellow
    Prodigy 40 points

    Yeah I am using a transceiver chip to hook up to a UART, which is how I'm planning on programming the chip using the msp430-bsl program with MSPGCC.  The voltages from the computer are -10 to 10 ish and the outputs of the transceiver are 0 to 3.3V.  I think we are both on the same page, but there must be a small nuance that I am missing, as I am doing exactly what you described above.

  • 0 in reply to Riley Pack
    Intellectual 280 points

    You might want to send the part markings from the MSP430 that you are using to TI tech support and ask them if this is the version of the chip that has the BSL disabled.  They did that for the older versions.  I found that out the hard way just a few weeks ago.  I went back and forth with them for a month before we figured that one out.

    I am doing exactly the same thing that you are, and I am using the BSL_Scripter program to load my source code to the MSP430F5438.  The command to change the baud rate from 9600 to 57600 is inop so far, but I am in touch with TI TS on that.

    Good luck,

    Lane

  • 0 in reply to Lane Mitcham
    TI__Mastermind 24180 points

    FYI the chips with BSL disabled are the experimental "XMS" chips. If your top-side markings have XMS430... instead of MSP430 then your BSL is disabled! Order or sample a newer revision.

  • 0 in reply to Brandon08
    Prodigy 40 points

    I'll check on that today.  We ended up having a weird RS-232 transceiver chip, so we just hacked on a JTAG connection and borrowed an MSP430FET.  Thanks for all of the help!

  • 0 in reply to Riley Pack
    TI__Expert 3690 points

    Does anybody know if the XMS430F5438A devices have anything pre-programmed in the BSL memory area?

    Also, the MSP430 Memory Programming Users Guide is unclear with respect to the entry sequence used for F5xx devices.  Section 2.2.1 talks about devices with dedicated TEST pins, but Section 2.2.2 talks about devices with dedicated JTAG pins.  Both of these pin configurations apply to the F5xx devices, so which entry sequence is it?

  • 0 in reply to Randy Wu
    Guru 58965 points

    Randy Wu said:

    Does anybody know if the XMS430F5438A devices have anything pre-programmed in the BSL memory area? ...

    I am sick of waiting for MSP430F54xxA and did not know that there is a XMS430F5438A. Can you tell me how to get one? As for what is in the BSL memory area, I will post some code to find that. (Within a day or two.)

    Randy Wu said:

    ... Also, the MSP430 Memory Programming Users Guide is unclear with respect to the entry sequence used for F5xx devices.  Section 2.2.1 talks about devices with dedicated TEST pins, but Section 2.2.2 talks about devices with dedicated JTAG pins.  Both of these pin configurations apply to the F5xx devices, so which entry sequence is it?

    You use the RST/NMI pin and the TEST pin (not the JTAG pins) to enter BSL.

  • 0 in reply to old_cow_yellow
    Intellectual 280 points

    Randy,

     

    The XMS430F5438A devices do not have the pre-programmed BSL area.  TI had tried to address the issue with a hardware fix before the end of last year, but I have heard nothing about that since November.  I did hear that the MSP430F5438A chips were being delayed again, until around April, so I am sticking with the Rev L of the non-A parts till then.

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