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Hi,
i am using the ez430 chronos watch that has a CC430F6137 SoC. The default value of PMMCOREV is 0 according to the datasheet, however the register field has the value 3 (the highest level) at the beginning of the main function (checked with and without the debugger). I have not found anything that would change this register either in the startup code that the IAR compiler addsbefore calling the main. Therefore i wondered if the datasheet is wrong, if the chronos has a different revision of the soc or if i am missing something here.
Thanks for any hints.
The CC430 Family User's Guide SLAU259B shows that the PMMCOREV bits in Power Management Module Control Register 0 (PMMCTL0) are cleared by a Brown Out Reset (BOR).
Therefore, if a Power On Reset (POR) or Power Up Clear (PUC) restarts the CC430F6137 the PMMCOREV bits will maintain their value prior to the reset.
The System Resets, Interrupts, and Operating Modes, System Control Module (SYS) section of the User's Guide explain the difference between BOR, POR and PUC.
Does the code in the CC430F6137 change the PMMCOREV bits sometime from main?
Also, when debugging programs I am not sure which reset method is used, but in the past have got confused due to some registers settings only cleared by a BOR being left at their settings from the previous program that was run.
Hi Chester,
thanks you for your answer.
I have tested it without the debugger aswell by removing the battery, which results in a bor reset. My software sets PMMCOREV to 1 anyways (and i verfied that).
I modified the firmware on my Chronos to display the PMMCOREV bits in the PMMCTL0 register and the SYSRSTIV register contents at entry to main on the "welcome" screen in the test_mode function. The values displayed were:
1) if a software BOR is generated, by entering rFBsl mode when the access point isn't connected then:
- Displayed PMMCOREV = 0
- Displayed SYSRSTIV = 06h = PMMSWBOR (BOR)
2) If the battery is removed and re-inserted then sometimes get a BOR reset:
- Displayed PMMCOREV = 0
- Displayed SYSRSTIV = 02h = Brownout (BOR)
and sometimes get a SVSH reset:
- Displayed PMMCOREV = 3
- Displayed SYSRSTIV = 0Eh = SVSH (POR)
In this case the firmware must be initialising after a BOR to get as far as setting the PMMCOREV to 3 (in the init_application) but then gets a SVSH POR due to a supply "glitch" due to the battery insertion.
Therefore, don't understand the cause of your initial PMMCOREV of 3.
Well this is odd. I assume that you dont use the original TI firmware, because PMMCOREV is always set to 3 before the test_mode call.
I did the same thing and used the rFBsl mode without an AP and the register field still has initially the value 3. As i said my code checks the register value right at the beginning of the main function, so the firmware does not change any register unless IAR adds some code that changes this register before the main is called.
I use IAR 5.10.6, several 868 MHz Chronos, which show the same result and a modified version of the original 1.1 chronos project.
I wasn't clear - I saved the register values at the start of main and passed the saved parameters into test_mode. My main function is:mark sonnentag said:Well this is odd. I assume that you dont use the original TI firmware, because PMMCOREV is always set to 3 before the test_mode call.
int main(void)
{
volatile u8 ps;
int initial_PMMCTL0 = PMMCTL0; // Added
int initial_SYSRSTIV = SYSRSTIV; // Added
// Init MCU
init_application();
// Assign initial value to global variables
init_global_variables();
// Branch to welcome screen
test_mode(initial_PMMCTL0, initial_SYSRSTIV); // Added parameters
// Main control loop: wait in low power mode until some event needs to be processed
while(1)
{
// When idle go to LPM3
idle_loop();
// Process wake-up events
if (button.all_flags || sys.all_flags) wakeup_event();
// Process actions requested by logic modules
if (request.all_flags) process_requests();
// Before going to LPM3, update display
if (display.all_flags) display_update();
}
}
Modified function prototype in test.h:
Modified start of test_mode function in test.c (rest of function unchanged):extern void test_mode(int initial_PMMCTL0, int initial_SYSRSTIV);
This is based upon V1.5 (16.03.2010) of the ez430_chronos project compiled for the 868MHz Unrestricted - Unrestricted CCS Platinum build configuration, using CCS 5.2 and MSP430 compiler v4.0.2void test_mode(int initial_PMMCTL0, int initial_SYSRSTIV) // Added parameters
{
u8 test_step, start_next_test;
u8 * str;
u8 i;
// Disable timer - no need for a clock tick
Timer0_Stop();
// Disable LCD charge pump while in standby mode
// This reduces current consumption by ca. 5µA to ca. 10µA
LCDBVCTL = 0;
// Show welcome screen
char test[5] = "0000";
test[3] = (initial_PMMCTL0 & 3) + '0';
display_chars(LCD_SEG_L1_3_0, (u8*)test, SEG_ON); // Displays PMMCOREV
//display_chars(LCD_SEG_L1_3_0, (u8*)"0430", SEG_ON);
display_chars(LCD_SEG_L2_2_0, (u8*)itoa(initial_SYSRSTIV, 3, 0), SEG_ON); // Displays SYSRSTIV in decimal
//display_chars(LCD_SEG_L2_4_0, (u8*)"CC430", SEG_ON);
display_symbol(LCD_SEG_L1_COL, SEG_ON);
display_symbol(LCD_ICON_HEART, SEG_ON);
display_symbol(LCD_ICON_STOPWATCH, SEG_ON);
display_symbol(LCD_ICON_RECORD, SEG_ON);
display_symbol(LCD_ICON_ALARM, SEG_ON);
display_symbol(LCD_ICON_BEEPER1, SEG_ON);
display_symbol(LCD_ICON_BEEPER2, SEG_ON);
display_symbol(LCD_ICON_BEEPER3, SEG_ON);
display_symbol(LCD_SYMB_ARROW_UP, SEG_ON);
display_symbol(LCD_SYMB_ARROW_DOWN, SEG_ON);
display_symbol(LCD_SYMB_AM, SEG_ON);
I don't have a full IAR compiler license to try, and if I use IAR Kickstart to try and compile the "868MHz - Limited IAR Kickstart" get linker errors.
I know now why the register field has the value 3.
I found this definition in a header of the SimpliciTI part:
#define BSP_EARLY_INIT(void) __intrinsic int __low_level_init(void)
Therefore the code of this BSB_EARLY_INIT function is added to the startup code. This function sets the pmmcorev to 3 too. Redudant code but oh well at least i found some code that i can remove.
And here the part for CCS:
/* Initialization call provided in CCE environment before standard C-startup */
// [BM] Cannot have a second low level init! Already done by application!
//#define BSP_EARLY_INIT(void) int _system_pre_init(void)
this is why you had different results.
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