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Problem in using eUSCI_B in SPI master 3-wire mode. MSP430FR5738. There is not CLK clock on P2.2/UCB0CLK pin at byte transmission.

Hi.

It is used 24 MHz as MCLK and SMCLK. eUSCI used SMCLK. I tried 20 MHz as MCLK and 10 MHz as SMCLK. Nothing happened.

  • What else are you doing? SPi does nto generate a continuous clock. I tonly generates clock pulses when it is shifting out data. Nothign to send = no clock. (so for receiving, you'll have to send too)

  • I know about clock generation just  in shifting time. Thanks. I changed source clock from SMCLK to ACLK else. Reduced module clock to 1 MHz. The same situation. Today I have idea to transmit my SPI master to A port. There is so posibility in my project. Just to check, will SPI work at maste mode on the other module. And one more - I found, OFIFG flag is 1 always time. I use DCO only. Is it normal?

  • Ok. I took result on port A. It’s worked. I saw oscillogram, I saw a receive event on the slave device. What is the difference between port A and port B?

    For more information, LPC1758 presents on port A and Atmel DataFlash presents on port B.

  • Vladimir Perevertkin said:
    And one more - I found, OFIFG flag is 1 always time. I use DCO only. Is it normal?

    Well, it depends on how you initialize the clock system. If you don't touch the clock and work with th edefaults, then yes, this is normal. OFIFG (and the other xxOFFG bits) can only be cleared in software (they don't clear themselves) and only if the prerequisite is met. In case of the OFIFG, all xxOFFG bits msut be clear, in case of the xxOF bits, the associated oscillator must be running or be disabled. At startup. DCOOFFG (because the DCO runs on lowest tap) and XT1LFOFFG (because LFXT1 is by default active and the crystal isn't already up at power-on) are set, and so is OFIFG.

    Regarding your SPI problem. there can be many reasons, from a wrong port configuration to a bad initialization. You should post your code for analysis. From 'it's not working' alone, I cannot see anything and imagien everything. It's like calling the doctor on the phone, saying "I don't feel well, what do I have?"

  • Vladimir Perevertkin said:
    What is the difference between port A and port B

    For SPI, there shouldn't be a difference. However, I dimly remember other threads also reporting problems with the USCI B module. I'm not sure whether it was the same MSP. Maybe there is a silicon problem? Or a typo in the header files, leading to wrong registers being programmed.

    Vladimir Perevertkin said:
    LPC1758 presents on port A and Atmel DataFlash presents on port B.

    Do you need simultaneous (or interleaved) transfers on both devices? If not, you can use one port for both (SPI is a bus). You only need a separate CS signal for the two.

  • Int main(void)
    {
      WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
      CSCTL0_H = 0xa5;                      // start config by password
      CSCTL1 |= (DCORSEL|DCOFSEL0);         // select 20 MHz
      CSCTL3 &= ~(DIVM0|DIVM1|DIVM2|DIVS0); // divider

      UCA0CTLW0 = UCSWRST;                     // **Put state machine in reset**
      UCA0CTLW0 |= UCMST|UCMSB|UCMODE_0|UCSYNC|UCSSEL_2;        // 3-pin, 8-bit, SPI master, MSB
      UCA0BRW = 0x01;
      P1DIR  |= BIT4;                         // BIT 4 = SS
      P1OUT  &=~BIT4;
      P1DIR  |= BIT5;                         // BIT 5 = CLK
      P2DIR  |= BIT0;                         // BIT 0 = SIMO
      P1SEL1 |= BIT5;                           // CLK pins functions
      P2SEL1 |= BIT0 + BIT1;                    // SOMI SIMO pins functions
      UCA0CTLW0 &= ~UCSWRST;
     
      for (;;)
      {
          UCA0TXBUF = data;
          while ( UCA0STATW & UCBUSY );
          rb = UCA0RXBUF;

      }
    }
    It’s code sequence, worked on port A
    The next one is for port B:
    Int main (void)
    {
      WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
      CSCTL0_H = 0xa5;                      // start config by password
      CSCTL1 |= (DCORSEL|DCOFSEL0);         // select 20 MHz
      CSCTL3 &= ~(DIVM0|DIVM1|DIVM2|DIVS0); // divider

      UCB0CTLW0 = UCSWRST;                    // **Put state machine in reset**
      UCB0CTLW0 |= (UCMST|UCMSB|UCSYNC|UCSSEL0|UCSSEL1);
      UCB0BRW = 1;
      P2DIR |= BIT2;
      P1DIR |= BIT6;
      P1SEL0 |= BIT6 + BIT7; P1SEL1 &= ~(BIT6 + BIT7);                    // SOMI SIMO pins functions
      P2SEL0 |= BIT2; P2SEL1 &= ~BIT2;                           // CLK pins functions
      UCB0CTLW0 &= ~UCSWRST;

      for (;;)
      {
          UCB0TXBUF = data;
          while ( UCB0STATW & UCBUSY );
          rb = UCB0RXBUF;

      }
    }

  • Jens-Michael Gross said:

    What is the difference between port A and port B

    For SPI, there shouldn't be a difference. However, I dimly remember other threads also reporting problems with the USCI B module. I'm not sure whether it was the same MSP. Maybe there is a silicon problem? Or a typo in the header files, leading to wrong registers being programmed.

    Vladimir Perevertkin said:
    LPC1758 presents on port A and Atmel DataFlash presents on port B.

    Do you need simultaneous (or interleaved) transfers on both devices? If not, you can use one port for both (SPI is a bus). You only need a separate CS signal for the two.

    [/quote]

    I checked base address of port B. It's normal = 0x640.

    I can't use port A on two directions. In first time a port A has to work as slave. In second time it is a ready board.

  • And what? Nobody from TI support team can clear up the problem? I have some identical devices. All of them work the same. It's checked.

  • Vladimir Perevertkin said:
      P1SEL0 |= BIT6 + BIT7; P1SEL1 &= ~(BIT6 + BIT7);                    // SOMI SIMO pins functions

    here we go.

    According to the datasheet, P1SEL0.x mus tbe clear and P1SEL1.x mus tbe set for USCI operation. You configure it for tiemr operation. (see datasheet, P1.6/P1.7 I/O schematics and pin functions table.)

  • OK, great thanks. In the scheme I took from my hardware designer the SPI port B set as primary function. Why? It is because in slau639D in the graphic image against pin 15 it is told – P2.2/UCB0CLK. And I decided that it is primary function. It’s our mistake. We didn’t check a datasheet careful. Once again many thanks.

  • What document are you talking of? I searched for "slau639" but diodn't get any hit on the TI website. The 'u# seems to denote a users guide, but all I know have different numbers.

    However, it's possible that the schematic was only listing the used function (USCI) and the port pin, and not all functions (these take quite some space on some port pins, clobbering the schematics)

  • Vladimir Perevertkin said:
    SLAS639A.

    Ah. Okay, even in the newest revision D, the TB1.0 is missing on this pin.

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