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Setting up UART interface between ez430-RF2500 and msp430-f5438a

Michael Bova
Other Parts Discussed in Thread: MSP430F5438A

I am attempting to set up a UART interface between an ez430-rf2500 (access point) and an msp430f5438a.  I want to send an array of characters from the transmit pin of the ez430 to a receive pin of the msp430f5438a.  I've been working on this for days now and can't seem to get it to work.  The register I've chosen for the msp430 is USCI_A0.  Tx and Rx are P3.4 and P3.5, respectively.  It is interrupt driven, and interrupts are occurring when they should but the data received only ever seems to be values such as FF or FE.  I connected the ez430 to a debugging device and determined that it is indeed sending the correct data.  This leads me to believe it is an issue on the MSP430 side of things, and not the ez430 side.  Any thoughts?  

Here is my code to initialize the msp430 register USCI_A0, and the ISR that should be receiving the data

init:

#define UCA0_TX_PIN (0x10) //P3.4
#define UCA0_RX_PIN (0x20) //P3.5
#define UCA0_TXRX_PIN (0x30) //P3.4 & P3.5
volatile uint8_t id; //node id of this ez430 read
volatile uint8_t ss; //node signal strength of this ez430 read
//used to keep track of what byte we're receiving
 volatile int ez430_uca0_isr_rx_register;
//boolean value that let's the application know that the ISR has received all
//the data from the ez430
int isDataReady;
void ez430_initialize_interface()
{
//Disable USCI_A0 using reset
UCA0CTL1 = UCSWRST;
P3DIR |= UCA0_TX_PIN; //set Tx to output
P3DIR &= ~UCA0_RX_PIN; //set RX to input
P3REN |= UCA0_TXRX_PIN; //enable the registers
P3IN |= UCA0_RX_PIN;
P3OUT |= UCA0_TX_PIN;
P3SEL |= UCA0_TXRX_PIN; // P3.4,5 = USCI_A0 TXD/RXD
UCA0BR0 = 0x41;              // 9600 from 8Mhz
UCA0BR1 = 0x03;
UCA0CTL1 |= UCSSEL__SMCLK;    // SMCLK
UCA0MCTL = UCBRS_1 + UCBRF_0;            // Modulation UCBRSx=1, UCBRFx=0
UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
UCA0IE |= UCRXIE;    // Enable USCI_A0 RX interrupt
}
ISR:
#pragma vector=USCI_A0_VECTOR
__interrupt void ez430_uca0_isr()
{
volatile int data_in;
// Check for RX interrupt
if(UCA0IFG & UCRXIFG) {
UCA0IFG &= ~UCRXIFG; //clear the interrupt
//check for an error
if(UCA0STAT & UCRXERR){
putc('!', stderr);
}
//save off the data
data_in = (int)UCA0RXBUF;
print_int_dec(ez430_uca0_isr_rx_register); //FIXME test print
switch(ez430_uca0_isr_rx_register) {
case 0x00: //ID
id = data_in;
break;
case 0x01: //Signal Strength
ss = data_in;
isDataReady = 1;
break;
}+
++ez430_uca0_isr_rx_register;
}
}

Thanks for any help you can lend me, I'm at a loss and this project is due very soon.

  • 0
    Guru 25210 points

    Have you verified (with a scope probe, etc) that the data coming to the MSP430 is of the correct data rate and bit timing?

  • 0 in reply to Brian Boorman
    Guru 25210 points

    Also, generally it is recommended that you use the Async UART in oversampling mode (i.e. BITCLK = 16 * baud_rate). There are control bits to enable this, and your BRG values need to be adjusted accordingly ( BRG1=0x00, BRG0=0x34 ).

  • 0 in reply to Brian Boorman

    Thanks for the response!

    The data being sent has been verified with a scope.  We are fairly sure that it isn't a transmitting error on the eZ430 side of things.  After scavenging through the datasheet, we found the oversampling mode you mentioned and initialized things that way.  Whenever we set the UCOS16 bit to set the device to oversample, we no longer receive any interrupts.  

    #define UCA0_TX_PIN (0x10) //P3.4
    #define UCA0_RX_PIN (0x20) //P3.5
    #define UCA0_TXRX_PIN (0x30)    //P3.4 & P3.5
    void ez430_initialize_interface()
    {
    //Disable USCI_A0 using reset
    UCA0CTL1 = UCSWRST;
    P3DIR |= UCA0_TX_PIN; //set Tx to output
    P3DIR &= ~UCA0_RX_PIN; //set RX to input
    P3REN |= UCA0_TXRX_PIN; //enable the registers
    P3IN |= UCA0_RX_PIN;
    P3OUT |= UCA0_TX_PIN;
    P3SEL |= UCA0_TXRX_PIN; // P3.4,5 = USCI_A0 TXD/RXD
    UCA0BR0 = 0x34;              // 9600 from 8Mhz
    UCA0BR1 = 0x00;
    UCA0CTL0 &= ~UCSYNC; //asynchronous clock 0x01
    UCA0CTL1 |= UCSSEL__SMCLK;    // SMCLK 0x80
    UCA0MCTL = UCBRS_0 + UCBRF_1 + UCOS16; //UCBRSX=0x0, UCBRFx=1, in overclocking mode (UCA0MCTL = 0x11)
    UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
    UCA0IE |= UCRXIE;    // Enable USCI_A0 RX interrupt
    }

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