• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 78 subscribers
  • Views 3075 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Right moment to set UCTXSTP bit

Markus16197
Prodigy 140 points
Other Parts Discussed in Thread: MSP430F5438

Hi!

I have an I2C EEPROM connected to an MSP430F5438 with the MSP being the one and only master on the bus. When reading from the EEPROM the MSP reads one byte more than I want it to read. I suspect this happens because my code sets the UCTXSTP bit (which activates sending of a stop condition) after getting the RX flag for the last byte. The USCI then shifts another byte into its shift register while the value from the RX buffer is being copied. The USCI behaves like I expect when I set the UCTXSTP directly after reading the penultimate byte from the RX buffer but I wonder if this is the way it should be done because the state diagrams in the MSPF4538 user guide show something different. So, when is the UCTXSTP bit supposed to be set?

Regards,
Markus

  • 0
    TI__Mastermind 26380 points

    Markus,

    Whe the MSP430 is configured as a master receiver - if multiple (>1) bytes are received the UCTXSTP is set after the reception of the N-1th byte. For example if you want to read 10 bytes from the slave then (1) Read the 9th byte (2) Set the UCTXSTP bit and (3) Read the 10th byte.

    You can see this being followed in our code example msp430x54x_uscib0_i2c_10.c found online.

        if (RXByteCtr)
        {
          *PRxData++ = UCB0RXBUF;               // Move RX data to address PRxData
          if (RXByteCtr == 1)                     // Only one byte left?
            UCB0CTL1 |= UCTXSTP;                // Generate I2C stop condition
        }
        else
        {
          *PRxData = UCB0RXBUF;                 // Move final RX data to PRxData
          __bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
        }

    In case only one byte is being received, the UCTXSTP bit is set along with the STT bit as: UCB0CTL1 |= UCTXSTT + UCTXSTP;

    The state diagram in the 5xx UG for master receiver indicates that the UCTXSTP needs to be set before the last byte is received.

    Regards,

    Priya

     

  • 0 in reply to Priya Thanigai
    Prodigy 140 points

    Priya said:

    The state diagram in the 5xx UG for master receiver indicates that the UCTXSTP needs to be set before the last byte is received.

    I guess with "before the last byte is received" you mean before the RX flag for the last byte is set. This is the important bit of information for me since it means that it can happen that the receiver starts reading in an extra byte from the slave when the program gets interrupted (assuming that it doens't run in interrupt context) between reading the RX buffer and writing of the UCTXSTP bit.

    BTW, it seems that I have to read the RX buffer once in order to clear the RX flag before switching from master transmitter mode (e. g. after sending an address byte to the slave) to master receiver mode. It took me a while to figure this out, since other implementations for I2C master which I found on the web don't seem to need this.

    Thanks,
    Markus

**Attention** This is a public forum