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I'm trying to develop some I2C interrupt handlers for an MSP430F5529, but setting the UCTXSTP bit in UCB1CTL1 doesn't work as I expect. By looking at the "Registers" window, I found out that the UCTXSTP bit isn't always set when I execute UCB1CTL1 |= UCTXSTP.
More specifically, if UCB1STAT == 0x50 (that is, if UCSLLOW and UCBBUSY are asserted) then UCTXSTP doesn't get set. However, if UCB1STAT == 0x00, then this operation does work. Is there something that I'm missing, and how can I work around this?
This is strange.
While a transfer is ongoing (which implies UCBUSY set), then UCTXSTP should be accepted. If not, it makes no sense setting UCTXSTP.
UCSCLLOW is set when the USCI sets SCL high but it remains low. This may be due to weak pull-ups (SCL is rising very slowly) or because the slave holds SCL low. Or a different master is using the bus (this could also trigger an arbitration lost interrupt). Or the USCI is holding SCL low itself, because it requires a user input. E.g. in receive mode, RXBUF is full and the next byte is about to be completed too, so RXBUF needs to be read, or start byte in transmit mode has been sent but nothing is in TXBUF. (in this case, setting UCTXSTP would make the USCI continue, fetch the ACK/NACK and then send the stop)
So the question is: why is SCLLOW set.
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