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External memory connected to MSP430

aravind vadrevu16
Prodigy 20 points


I have the 256KB parallel FRAM chip (FM28V020-SG, http://www.cypress.com/?docID=48246) connected to an MSP430 micro controller (FR5969 on TS-430RGZ48C). The address (A0-A14),~CE, ~WE, ~OE and the data pins are connected to the MSP430 controlled GPIOs for programming. I am able to read and write to the external memory under normal operating conditions. 

However, I also see that when the VDD and VSS pins are NOT connected to a power source or when the voltage is brought under the normal operating conditions (<2V), the chip still functions by seemingly drawing current from the GPIO's (of the MSP430) and the voltage level between VDD and VSS pins is at 2.2 V. My setup includes pull down and pull up resistors configured within the MSP430 and the VDD, VSS sourced through an external DC power supply. MSP430, DC power supply and the FM28V020 are connected to a common ground as well. 

I wish to find an explanation for how the chip is able to draw current from address and control pins when VDD and VSS are NOT connected to a power source. I have spare chipsets and I see the same effect with multiple FM28V020's. Is this a known problem with MSP430 boards? If so, is there known solution. I suspect that it could be due to weak protection circuitry for parasitic currents on the FM28V020 but if it could be a  FR5969/Dev Board issue, it would be good to know. 

Thank you!

  • 0
    Guru 12956 points

    That's pretty typical behavior for most chips involving GPIO's.  You can actually power the MSP430 itself through a backchannel UART pin (typically driven or pulled high at idle) if the CPU isn't doing much once booted.  IIRC, I/O pins (including the address & data pins on your FRAM chip) have protection diodes attached to them which drain excess voltage above Vdd into the Vdd rail and voltages below Vss into the Vss rail.  Since your FRAM chip's Vdd is essentially 0V, that means your pullups will continuously drain current into the FRAM chip's Vdd rail through the protection diodes on one or more address/data/control pins, possibly providing enough voltage & current to power the whole chip.

    It's probably not a good idea to continue doing this for long.  What happens if most of your address & data pins are driven to GND (logical '0') for an extended period of time due to the data you're writing?  The FRAM Vdd/Vss rails might drain what capacitance they have and depower the chip, causing data corruption.  Plus those protection diodes have a limited amount of current they're designed to handle.  Do apply power to Vdd and GND to Vss.

  • 0 in reply to Eric Brundick
    Prodigy 20 points

    Yes, the chip maker confirmed that I/O pins have protection diodes that drain excess voltage into vdd. The design of the protection diodes is  here - 1447.IO.pdf

    When I set the address and data pins to zero, the external FRAM's VDD is also at zero. So, that confirms the presence of protection diodes. 

    My experiment is to notice the behavior of FRAM when the supply voltage is brought down under normal operating conditions. The normal operating condition is between 2.0V - 3.6V. However, I want to be able to check the behavior of writes and reads in the range of 1.0 - 2.0. This protection diode design wont allow that since there will be a voltage difference from the I/O pins (@ 3V as set by the MSP430) and the VDD (kept between 1.0 - 2.0 by external power supply). Is there a way to be able to under volt the FRAM in these circumstances? Your perspective would be greatly appreciated. 

    Thanks a lot for your reply! 

  • 0 in reply to aravind vadrevu16
    Guru 12956 points

    I'm not too experienced with this kind of stuff, but I suppose you could find some level shifters that run that low in order to test this.  Your MSP430 could run at its typical voltage (3.3V for example) while the FRAM pins plus the FRAM chip-side of the level shifter runs at ~1.0-2.0V.

  • 0
    Guru 227245 points

    The maximum input voltage to all MSP pins (except for the few 5v-tolerant parts or those with SD16 and +-0.6V analog input range) is VSS-0.3V to VCC+0.3V. If VCC is not powered, this is -0.3 to +0.3V. IF you apply a higher voltage than the current VCC to the pins, current will flow through internal clamp diodes to VCC or GND. As a result, it will raise VCC and power the MSP through it (for 0.3V, this is <=2mA current, which is th emaximum for hte diodes). On the other side, The current flowing into the pin will cause the input voltage to break down until an equilibrium is reached.
    The maximum rated current per pin is 2mA. If it is exceeded, the protection diodes will melt and either the pin is shorted to GND/VCC or loses its protection and will be fried.

    So yes, you can power the MSP through its I/O pins if you apply an input voltage while the MSP is unpowered. And for sure you shouldn’t do it.

    If there is no way around it, then you should either apply external clamp diodes (which allow larger currents) or use a series resistor (4k7 will limit a 5V input voltage to 1mA if the MSP is unpowered). Of course both ways waste energy.

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