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MSP430FG4618 DCO Calibration / ACLK not working

Other Parts Discussed in Thread: MSP430FG4618, MSP-FET

I believe that the ACLK on my MSP430FG4618 does not work or needs re-calibrating. Is there a way to reset to factory settings?

  • What do you mean with factory setting? The processor starts from scratch each time it is powered. Your source code then configures it and this happens each time you apply power to the device. What's wrong with your ACLK?

    Dennis
  • The ACLK is not related to the DCO clock in your device. The ACLK is only sourced by the LFXT1 (crystal) oscillator.

  • I have been trying to get this resolved for a couple of weeks now and being very new (i'm a student) I do not always understand what is being said so please forgive me for my ignorance.

    I have a C program that I wrote for school. I demonstrated it at school on an MSP430FG4618/F2013 target board just like what I have. My program uses ACLK for timing purposes to operate the buzzer. It works at school but not for me at home on my board. My PC's COM port is set the same as school. My target board is the same. Only difference is the EMULATOR. I have the new MSP-FET and we use the old MSP-FET430UIF at school.

    The program should not have to be modified because of the different emulator should it? If so that means I have to change it every time that I want to work at home and when I go to school. All I wanted to be able to do is work on it at home and demonstrate at school.

    I really really could use an answer in the simplest of terms if possible due to my short comings.

    Input is greatly appreciated!
  • Now you are changing subject, you have already a couple of thread’s with this question open. Continue with one of these, but in the mean time you can check if you power-up your board correctly, battery or AC-mains with the proper jumper settings, and not powered by FET.

  • Why not FET? That is how its powered at school. Here is a picture of the target board  .

    Here is my C code. This works at school. 

    #include <msp430xG46x.h>
    #define SW1 BIT0&P1IN
    #define SW2 BIT1&P1IN
    
    void main(void)
    {
      WDTCTL = WDT_MDLY_32;                 // WDT is clocked by fSMCLK - 32ms interval (default)
      P5DIR |= BIT1;                        // Set P5.1 output direction (LED4)
      P5OUT |= BIT1;                        // Turn of  LED4
      P3DIR |= BIT5;                        // Set P3.5 output direction (SP1... Speaker)
      P3SEL |= BIT5;                        // Turns off SP1
      IE1 |= WDTIE;                         // Enable WDT interrupt
      _EINT();                              // Enables global interrupts
      TB0CCTL4 = OUTMOD_4;                  // TB0 output is in toggle mode
      TB0CTL = TBSSEL_1 + MC_1;             // ACLK is clock source (32,768 Hz), UP mode
      TB0CCR0 = 31;                         // f = 32,768/(2*31)... 'C' note / 523.25 Hz
      TB0CCR4 = 1;                          // set count value
      _BIS_SR(LPM0_bits + GIE);                 // CPU off
    
      while (1)
        {
        if((SW1) != 0 && (SW2) !=0)         // Neither SW1 or SW2 is pressed
          {
            TB0CCR0 = 31;                   // f = 32,768/(2*31)... 'C' note / 523.25 Hz
          }
        if((SW1) == 0)                      // SW1 is pressed
          {
            TB0CCR0 = 28;                   // f = 32,768/(2*28)... 'D' note / 587.33 Hz
          }
        if((SW2) == 0)                      // SW2 is pressed
          {
            TB0CCR0 = 25;                   // f = 32,768/(2*25)... 'E' note / 659.26 Hz
          }    
        }
    }
    
    // Watchdog Timer interrupt service routine
    #pragma vector=WDT_VECTOR
    __interrupt void watchdog_timer(void)
    {
      static int i = 0;
      i++;
      if (i == 16) 
      {		                        // 1/2 second on, 1/2 second off (31.25 * 16 ms = 0.5s)
        P5OUT ^= BIT1;   	                // Toggle P5.1 using exclusive-OR
        i = 0;
      }
    }
    

  • San Badger Dude said:
    My program uses ACLK for timing purposes to operate the buzzer. It works at school but not for me at home on my board. My PC's COM port is set the same as school.

    Can you clarify what doesn't work?

    E.g. does the buzzer not sound, sound at the wrong frequency, or something else?

  • San Badger Dude said:
    Why not FET? That is how its powered at school

    And that’s exactly the difference with your school! Maybe the new FET gives for some reason a too low voltage for the buzzer. Why not try that?

  • Buzzer does not sound. Let me also mention that based on the code above an LED is to blink 1/2 sec on 1/2 sec off. It does blink but slower than 1/2 sec on 1/2 sec off.

  • Can you clarify on what to try? Where should power come from? I put the batteries in and changed the jumpers and get same result. NO BUZZER SOUND AT ALL.
  • As I know the buzzer must have a frequency of ~2.4KHz. Try with “TB0CCR0 = 7;”.

  • Still nothing.  I did get a sound from the buzzer using the SMCLK. Found this just to test buzzer. I need ACLK to work though.

    #include  <msp430xG46x.h>
    
    void main(void)
    {
      WDTCTL = WDTPW+WDTHOLD;                   // Stop WDT
      P3DIR |= BIT5;                            // P3.5 output
      P3SEL |= BIT5;
    
      TBCCR0 = 436-1;                           // PWM Period
      TBCCTL4 = OUTMOD_7;                       // CCR4 reset/set
      TBCCR4 = 218;                              // CCR4 PWM duty cycle
      TBCTL = TBSSEL_2+MC_1;                    // SMCLK, upmode
    
      _BIS_SR(LPM0_bits + GIE);                 // CPU off
    }

  • I did read the following in the users manual for the 4618... "During a LFXT1crystal
    failure, no ACLK signal is generated and the FLL+ continues to count down to
    zero in an attempt to lock ACLK and MCLK/(D×[N+1])." What would be something I might can do to check this or fix.
  • I got it! I don't understand completely but maybe someone can explain... I added the following line of code to my original program and it worked: 

    FLL_CTL0 |= XCAP14PF;

  • San Badger Dude said:
    I don't understand completely but maybe someone can explain... I added the following line of code to my original program and it worked: 

    FLL_CTL0 |= XCAP14PF;

    The software-selectable XCAPxPF bits configure the internally provided load capacitance for the LFXT1 crystal. The circuit diagram for the MSP430FG4618/F2013 Experimenter’s Board shows that no external load capacitors are fitted for the LFXT1 Oscillator.

    Section 5.2.3 LFXT1 Oscillator of the MSP430x4xx Family User’s Guide states:

    The default value of XCAPxPF is 0, providing a crystal load capacitance of ~1 pF. Reliable crystal operation may not be achieved unless the crystal is provided with the proper load capacitance, either by selection of XCAPxPF values or by external capacitors.
    Therefore, by not selecting any internal load capacitance for the LFXT1 crystal the crystal may not operate reliably.

    The part number for the 32.768 KHz crystal on the MSP430FG4618/F2013 Experimenter’s Board is not given, so am not sure what load capacitance the crystal requires. However, the FG4618_RTC.c code in MSP430FG4618/F2013 Experimenter’s Board Software (Rev. C) does use XCAP14PF:

      FLL_CTL0 |= XCAP14PF;                     // Configure load caps
    

    Which suggests XCAP14PF is the required load capacitance to get reliable operation of the crystal.

  • I'm a bit puzzled by the "solution".
    The default crystal cap setting is 1pF load. With which the crystal surely won't start, neither at school nor at home.
    Due to device variations, the crystal may start with an slightly incorrect setting, or not. But not without load caps.
    It is correct that without crystal, the FLL will adjust the DCO down to minimum frequency. Which it should do at school as well as at home. The only difference might be the minimum frequency of the DCO, as this is also a device-specific value.

    The code does not check for fault flags and does not reset OIFG. On 4x family, this works, as only MCLK is held in fallback mode then (and it is running from MCLK anyway) On 2x or 5x family, it would prevent the crystal form being used at all. On 5x family, REFO would be used instead. in any case, the code as it is, is currently not really stable. And without setting the crystal caps, it was only coincidentally "working": with a device-dependent "random" frequency that was in the right range to operate the buzzer at school, but too low to do soon the device at home.

    The actual SMCLK can be output to P1.4 with
    P1SEL |= BIT4; P1DIR |= BIT4;
    If the crystal is running properly, it should settle at 1.048MHz. If the crystal doesn't run, it may go down to 300kHz (650kHz typically), operating the buzzer with down to 686Hz instead of the intended 2.4kHz.

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