USCI I2C master single byte receive

I'm using an MSP430F2132 USCI I2C master receive function to receive a single byte. The manual says that the stop must be issued while the read is in progress. This is what I think I'm doing, but what I see on the oscilloscope is START- SLAVE ADDRESS- READ BIT- ACK then SDA stays low, and SCL goes high and they both remain in that state.

I'm keeping it very simple with no interrupts or LPM. A snip of the code is shown below. What am I missing? Thanks.

/*** Processor initialized for I2C on P3.1, P3.2, clock for 50kHz using DCO***/

1) UCB0I2CCSA=slaveaddr;

2) UCB0CTL1 &= ~UCSWRST;

3) UCB0CTL1 &= ~UCTR;

4) UCB0CTL1 |= UCTXSTT;

5) while ((UCB0CTL1&UCTXSTT)==1){

}

6) UCB0CTL1 |= UCTXSTP;

7) while((IFG2&UCB0RXIFG!=0)){

}

8) data = UCB0RXBUF;

9) while((UCB0CTL1&UCTXSTP==1){

}

10) while(1){

}//trap here