MSP430 program automatically running after dumping without me pressing the run button

Arnab Chakraborty

Other Parts Discussed in Thread: MSP430F5528

Hello

I tried to dump the program in MSP430F5528. The program gets compiled and linked successfully but after dumping it is not running into main. It is stuck into infinite loop in data memory when I put break. I am sending the C code. Please check and help me resolve the issue.

Thanks

SPI_AFE_registers.c

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#include <msp430.h>
#include "math.h"
#include "driverlib.h"
void AFE44xx_PowerOn_Init(void);
void Init_AFE44xx_DRDY_Interrupt(void);
void Init_AFE44xx_Resource(void);
void AFE44xx_Default_Reg_Init(void);
void Enable_AFE44xx_DRDY_Interrupt(void);
void Disable_AFE44xx_DRDY_Interrupt (void);
void AFE44xx_Reg_Write (unsigned char reg_address, unsigned long data);
unsigned long AFE44xx_Reg_Read(unsigned char Reg_address);
void Init_Clock(void);                                              
void Set_GPIO(void);
void Set_UCB1_SPI(void);
void TI_AFE_SPIWriteReg(char addr, unsigned long value) ; 
void hyperterminal_trans(signed long);
void convert_hex_ascii(signed long);
unsigned char MST_Data,SLV_Data;
unsigned char temp;
//double x;
unsigned int read_index=0;
unsigned int i;
double AFE44xx_Data_buf;
double output[700];
double  AFE44xx_Data[700];
double x1=0,x2=0,x3=0,x4=0,y1=0,y2=0,y3=0,y4=0,mean=0;
  
double a[5]={1,-3.937196864436783,5.814107469382095,-3.816605103351482,0.939694595124756};
double b[4]={0.00468952844350029,0,-0.00937905688700058,0};
/*int low_level_init(void){
  WDTCTL=WDTPW+WDTHOLD;
  return 1;
}*/
 
#define AFE_RESETZ      BIT3
#define AFE_PDNZ        BIT4
#define AFE_ADC_DRDY    BIT5
#define AFE_PD_ALM      BIT6
#define AFE_LED_ALM     BIT7
#define AFE_DIAG_END    BIT2
#define DELAY_COUNT 2
//#define AFE_READ_BIT    0x80
//#define AFE_WRITE_BIT   0x7F
//#define AFE_ADC_RDY   0x1C
unsigned char readDataFlag=0;
 unsigned long  AFE44xx_Default_Register_Settings[49] =
{
    //Reg0: CONTROL0: CONTROL REGISTER 0
    0x00000,
    //Reg1:REDSTARTCOUNT: SAMPLE RED START COUNT
    6000,
        //Reg2:REDENDCOUNT: SAMPLE RED END COUNT
    7599,
        //Reg3:REDLEDSTARTCOUNT: RED LED START COUNT
    6000,
        //Reg4:REDLEDENDCOUNT: RED LED END COUNT
    7999,
    //Reg5:AMBREDSTARTCOUNT: SAMPLE AMBIENT RED START COUNT
    0,
    //Reg6:AMBREDENDCOUNT: SAMPLE AMBIENT RED END COUNT
    1599,
    //Reg7:IRSTARTCOUNT: SAMPLE IR START COUNT
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

#include <msp430.h>
#include "math.h"
#include "driverlib.h"
void AFE44xx_PowerOn_Init(void);
void Init_AFE44xx_DRDY_Interrupt(void);
void Init_AFE44xx_Resource(void);
void AFE44xx_Default_Reg_Init(void);
void Enable_AFE44xx_DRDY_Interrupt(void);
void Disable_AFE44xx_DRDY_Interrupt (void);
void AFE44xx_Reg_Write (unsigned char reg_address, unsigned long data);
unsigned long AFE44xx_Reg_Read(unsigned char Reg_address);
void Init_Clock(void);                                              
void Set_GPIO(void);
void Set_UCB1_SPI(void);
void TI_AFE_SPIWriteReg(char addr, unsigned long value) ; 
void hyperterminal_trans(signed long);
void convert_hex_ascii(signed long);
unsigned char MST_Data,SLV_Data;
unsigned char temp;
//double x;
unsigned int read_index=0;
unsigned int i;
double AFE44xx_Data_buf;
double output[700];
double  AFE44xx_Data[700];
double x1=0,x2=0,x3=0,x4=0,y1=0,y2=0,y3=0,y4=0,mean=0;
  

double a[5]={1,-3.937196864436783,5.814107469382095,-3.816605103351482,0.939694595124756};
double b[4]={0.00468952844350029,0,-0.00937905688700058,0};
/*int low_level_init(void){
  WDTCTL=WDTPW+WDTHOLD;
  return 1;
}*/

 

#define AFE_RESETZ      BIT3
#define AFE_PDNZ        BIT4
#define AFE_ADC_DRDY    BIT5
#define AFE_PD_ALM      BIT6
#define AFE_LED_ALM     BIT7
#define AFE_DIAG_END    BIT2
#define DELAY_COUNT 2
//#define AFE_READ_BIT    0x80
//#define AFE_WRITE_BIT   0x7F
//#define AFE_ADC_RDY   0x1C


unsigned char readDataFlag=0;
 unsigned long 	AFE44xx_Default_Register_Settings[49] =
{
	//Reg0: CONTROL0: CONTROL REGISTER 0
	0x00000,
   	//Reg1:REDSTARTCOUNT: SAMPLE RED START COUNT
	6000,
        //Reg2:REDENDCOUNT: SAMPLE RED END COUNT
	7599,
        //Reg3:REDLEDSTARTCOUNT: RED LED START COUNT
	6000,
        //Reg4:REDLEDENDCOUNT: RED LED END COUNT
	7999,
	//Reg5:AMBREDSTARTCOUNT: SAMPLE AMBIENT RED START COUNT
	0,
	//Reg6:AMBREDENDCOUNT: SAMPLE AMBIENT RED END COUNT
	1599,
	//Reg7:IRSTARTCOUNT: SAMPLE IR START COUNT
	2000,
        //Reg8:IRENDCOUNT: SAMPLE IR END COUNT
	3599,
        //Reg9:IRLEDSTARTCOUNT: IR LED START COUNT
	2000,
	//Reg10:IRLEDENDCOUNT: IR LED END COUNT
	3599,
	//Reg11:AMBIRSTARTCOUNT: SAMPLE AMBIENT IR START COUNT
	4000,
        // Reg12:AMBIRENDCOUNT: SAMPLE AMBIENT IR END COUNT
	5599,
	//Reg13:REDCONVSTART: REDCONVST
	2,
	//Reg14:REDCONVEND: RED CONVERT END COUNT
	1999,
	//Reg15:AMBREDCONVSTART: RED AMBIENT CONVERT START COUNT
	2002,
	//Reg16:AMBREDCONVEND: RED AMBIENT CONVERT END COUNT
	3999,
	//Reg17:IRCONVSTART: IR CONVERT START COUNT
	4002,
	//Reg18:IRCONVEND: IR CONVERT END COUNT
	5999,
	//Reg19:AMBIRCONVSTART: IR AMBIENT CONVERT START COUNT
	6002,
	//Reg20:AMBIRCONVEND: IR AMBIENT CONVERT END COUNT
	7999,
	//Reg21:ADCRESETSTCOUNT0: ADC RESET 0 START COUNT
	0,
	//Reg22:ADCRESETENDCOUNT0: ADC RESET 0 END COUNT
	0,
	//Reg23:ADCRESETSTCOUNT1: ADC RESET 1 START COUNT
	2000,
        //Reg24:ADCRESETENDCOUNT1: ADC RESET 1 END COUNT
	2000,
	//Reg25:ADCRESETENDCOUNT2: ADC RESET 2 START COUNT
	4000,
	//Reg26:ADCRESETENDCOUNT2: ADC RESET 2 END COUNT
	4000,
	//Reg27:ADCRESETENDCOUNT3: ADC RESET 3 START COUNT
	6000,
	//Reg28:ADCRESETENDCOUNT3: ADC RESET 3 END COUNT
	6000,
	//Reg29:PRPCOUNT: PULSE REPETITION PERIOD COUNT
	7999,
	//Reg30:CONTROL1: CONTROL REGISTER 1
	0x00102,  //timer enabled, averages=3, RED and IR LED pulse ON PD_ALM AND LED_ALM pins
        //Reg31:?: ??
	0x00000,
	//Reg32:TIAGAIN: TRANS IMPEDANCE AMPLIFIER GAIN SETTING REGISTER
	0x00000,
	//Reg33:TIA_AMB_GAIN: TRANS IMPEDANCE AAMPLIFIER AND AMBIENT CANELLATION STAGE GAIN
	0x00000,
        //Reg34:LEDCNTRL: LED CONTROL REGISTER
	//0x11414,
        //0x1FFFF,
        0x11E1E,
	//Reg35:CONTROL2: CONTROL REGISTER 2
	0x00000, //bit 9
	//Reg36:?: ??
	0x00000,
	//Reg37:?: ??
	0x00000,
	//Reg38:?: ??
	0x00000,
	 //Reg39:?: ??
	0x00000,
	 //Reg40:: ??
	0x00000,
	//Reg41:ALARM: ??
	0x00000,
	//Reg42:REDVALUE: RED DIGITAL SAMPLE VALUE
	0x00000,
	//Reg43:AMBREDVALUE: Ambient RED Digital Sample Value
	0x00000,
	//Reg44:IRVALUE: IR Digital Sample Value
	0x00000,
	//Reg45:AMBIRVALUE: Ambient IR Digital Sample Value
	0x00000,
	//Reg46:RED-AMBREDVALUE: RED-AMBIENT RED DIGITAL SAMPLE VALUE
	0x00000,
        //Reg47:IR-AMBIRVALUE: IR-AMBIENT IR DIGITAL SAMPLE VALUE
	0x00000,
	// Reg48:DIGNOSTICS: DIAGNOSTICS FLAGS REGISTER
	0x00000
};


unsigned long AFExx_registers[49];


void main(void)
{
  
  WDTCTL = WDTPW + WDTHOLD;
  unsigned int i,k;
  




 
   AFE44xx_PowerOn_Init(); 
   GPIO_setAsPeripheralModuleFunctionInputPin(
                GPIO_PORT_P4,
                GPIO_PIN4 + GPIO_PIN5 
                );

 if ( STATUS_FAIL == USCI_A_UART_initAdvance(USCI_A1_BASE,
                                                    USCI_A_UART_CLOCKSOURCE_SMCLK,
                                                  109,
                                                    0,
                                                    2,
                                                    USCI_A_UART_NO_PARITY,
                                                    USCI_A_UART_LSB_FIRST,
                                                    USCI_A_UART_ONE_STOP_BIT,
                                                    USCI_A_UART_MODE,
                                                    USCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION ))
                return;
        USCI_A_UART_enable(USCI_A1_BASE);

        //Enable Receive Interrupt
        USCI_A_UART_clearInterruptFlag(USCI_A1_BASE,
                                       USCI_A_UART_RECEIVE_INTERRUPT);
        USCI_A_UART_enableInterrupt(USCI_A1_BASE,
                                    USCI_A_UART_RECEIVE_INTERRUPT);
         // __enable_interrupt();
  
  Enable_AFE44xx_DRDY_Interrupt();
  for(i=50;i>0;i--);                        // Wait for slave to initialize
 

 //__bis_SR_register(LPM0_bits + GIE);       // CPU off, enable interrupts
  __bis_SR_register(GIE);
  while(1)
  {
    
    //Enable_AFE44xx_DRDY_Interrupt();  
   
               
          
   
    if(readDataFlag == 1)
    {
      readDataFlag=0;
      AFE44xx_Data[read_index++]=AFE44xx_Data_buf*1.2/pow(2,21);
      if(read_index == 700)
      {
         Disable_AFE44xx_DRDY_Interrupt();
        
     
      for(i=0;i<700;i++)
      {
        mean=mean+AFE44xx_Data[i];
      }
      mean=mean/700;
      i=0;
      while(i<700)
      {
         AFE44xx_Data[i]=AFE44xx_Data[i]-mean;
         output[i]=b[0]*AFE44xx_Data[i]+b[1]*x1+b[2]*x2+b[3]*x3+b[0]*x4-a[1]*y1-a[2]*y2-a[3]*y3-a[4]*y4;
         x1=AFE44xx_Data[i];
         y1=output[i];
         if(i>=1)
         {
           x2=AFE44xx_Data[i-1];
           y2=output[i-1];
         }
         if(i>=2)
         {
           x3=AFE44xx_Data[i-2];
           y3=output[i-2];
         }
         if(i>=3)
         {
           x4=AFE44xx_Data[i-3];
           y4=output[i-3];
         }
      i++;
      }
      //printf("%f", AFE44xx_Data[1]);
      read_index=0;  
      }
    
      //AFE44xx_Data_buf[index++]= AFE44xx_Reg_Read(44);
      //AFE44xx_Data_buf[1]= AFE44xx_Reg_Read(43);
      //AFE44xx_Data_buf[2]= AFE44xx_Reg_Read(44);
      //AFE44xx_Data_buf[3]= AFE44xx_Reg_Read(45);
      //AFE44xx_Data_buf[4]= AFE44xx_Reg_Read(46);
      //AFE44xx_Data_buf[5]= AFE44xx_Reg_Read(47);
    // if(index == 1026)
      //Enable_AFE44xx_DRDY_Interrupt();  
       // index = 0;
        
      
          //transmitData =  AFE44xx_Data_buf[0] ;    
        
      
    }
    Enable_AFE44xx_DRDY_Interrupt(); 
  // if(index==2048)
        {
          //for(i=0;i<2048;i++)
          {
          //hyperterminal_trans(AFE44xx_Data_buf[i]);
          }
          //index=0;
        } 
  
      
  }
    
}
 
                                 
              
  void hyperterminal_trans(signed long  transmitData)
  {
   //int count; 
 //  char array_value[300];
    convert_hex_ascii(transmitData);
    
    // recent   //B marks the end of transmission
         //while(!(((USCI_A_UART_transmitData(USCI_A1_BASE))->STATUS)  & 0x8UL)); 
         
  }
         
  
 void convert_hex_ascii(signed long val)

{       char array[20];
	int i = 0;
       int  count = 0; 
	signed long  temp_count = val;
	while(temp_count>9)
	{
          
          val=temp_count%10;
          array[i++]=(val+0x30);
          temp_count=temp_count/10;
	 
          count++;
          
        }
	array[i]=(temp_count|0x30);
        i=0;
	for(int x=count; x>=0; x--)
	{ 
          USCI_A_UART_transmitData(USCI_A1_BASE,array[x]);
        // while(!(((USCI_A_UART_transmitData(USCI_A1_BASE))->STATUS)  & 0x8UL));
        //  array_value[i++]=array[x];
         // LEUART1->TXDATA = array_value[i++];
        // while(!((LEUART1->STATUS)  & 0x8UL)); // 0x20 = tx complete for usart1 0x8 = tx complete for leu1
          //array_value[i++]=(array[x] * 256 *.010)/3.3 ; //changes made ( neethi)
          //array_tempout[i++] = (array_value[i++]* 3.3)/256;
          
	}
        
        USCI_A_UART_transmitData(USCI_A1_BASE,'\n'); 
        USCI_A_UART_transmitData(USCI_A1_BASE,'\r'); 
	//array_value[0]='\0';
                 
		
}               

// }
       
    
    
   
     
    /* for(i=0;i<49;i++)
      {
        AFExx_registers[i]=AFE44xx_Reg_Read(i);
         
      }*/
    
    
    
    
 

    
    




void AFE44xx_PowerOn_Init(void)
{
    volatile unsigned short Init_i, j;
    Init_AFE44xx_Resource();
    for (j = 0; j < DELAY_COUNT; j++)
    {
      for ( Init_i =0; Init_i < 20000; Init_i++);
      for ( Init_i =0; Init_i < 20000; Init_i++);
      for ( Init_i =0; Init_i < 20000; Init_i++);
    }
    Init_AFE44xx_DRDY_Interrupt();
    AFE44xx_Default_Reg_Init();
}
void AFE44xx_Default_Reg_Init(void)
{
    unsigned char Reg_Init_i;
    for ( Reg_Init_i = 0; Reg_Init_i < 49; Reg_Init_i++)
    {
      TI_AFE_SPIWriteReg(Reg_Init_i, AFE44xx_Default_Register_Settings[Reg_Init_i]);
    }
}
void Init_AFE44xx_Resource(void)
{
    Set_GPIO();										// Initializes AFE44xx's input control lines
    Set_UCB1_SPI();									// Initialize SPI regs.    
}
void AFE44xx_Reg_Write (unsigned char reg_address, unsigned long data)
{
    unsigned char dummy_rx;
    P4OUT|=BIT0;				// Set STE high
  
    
    //Set Control0 - Disable SPI Read bit
    //Write to register - byte wise transfer, 8-Bit transfers    
    P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.
    // Loop unrolling for machine cycle optimization
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: Address of register
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the second byte to the TX Buffer: Data[23:16]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the third byte to the TX Buffer: Data[15:8]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: Data[7:0]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    P4OUT|=0x01;  // SEN HIGH

    //Write to register - byte wise transfer, 8-Bit transfers   
    P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.    
    // Loop unrolling for machine cycle optimization
    UCB1TXBUF = reg_address;                    // Send the first byte to the TX Buffer: Address of register
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = (unsigned char)(data >>16);     // Send the second byte to the TX Buffer: Data[23:16]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = (unsigned char)(((data & 0x00FFFF) >>8));       // Send the third byte to the TX Buffer: Data[15:8]
    while ( (UCB1STAT & UCBUSY) );		                // USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			                // Dummy Read Rx buf
    
    UCB1TXBUF = (unsigned char)(((data & 0x0000FF)));           // Send the first byte to the TX Buffer: Data[7:0]
    while ( (UCB1STAT & UCBUSY) );		                // USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			                // Dummy Read Rx buf
    
    P4OUT|=0x01;  // SEN HIGH
}
unsigned long AFE44xx_Reg_Read(unsigned char Reg_address)
{
    
   unsigned char dummy_rx;
    unsigned long retVal, SPI_Rx_buf[10];
    P4OUT &=~BIT0;				  			// Set STE low
    retVal = 0;
    
    //Read register and set bit 0 to 1, to enable read
    //Set Control0 - Enable SPI Read bit
    P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.
    // Loop unrolling for machine cycle optimization
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: Address of register
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the second byte to the TX Buffer: Data[23:16]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the third byte to the TX Buffer: Data[15:8]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 1;                              // Send the first byte to the TX Buffer: Data[7:0]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    P4OUT|=0x01;  // set HIGH at end of transmission
    
    //Read from register - byte wise transfer, 8-Bit transfers
    P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.
    // Loop unrolling for machine cycle optimization
    UCB1TXBUF = Reg_address;                    // Send the first byte to the TX Buffer: Address of register
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    SPI_Rx_buf[0] = UCB1RXBUF;			// Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the second byte to the TX Buffer: dummy data
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    SPI_Rx_buf[1] = UCB1RXBUF;			// Read Rx buf: Data[23:16]
    
    UCB1TXBUF = 0;                              // Send the third byte to the TX Buffer: dummy data
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    SPI_Rx_buf[2] = UCB1RXBUF;			// Read Rx buf: Data[15:8]
    
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: dummy data
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    SPI_Rx_buf[3] = UCB1RXBUF;			// Read Rx buf: Data[7:0]
    
    P4OUT|=0x01;  // set HIGH at end of transmission
    
    
    //Set Control0 - Disable SPI Read bit
    //Write to register - byte wise transfer, 8-Bit transfers
    P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.
    // Loop unrolling for machine cycle optimization
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: Address of register
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the second byte to the TX Buffer: Data[23:16]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the third byte to the TX Buffer: Data[15:8]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    UCB1TXBUF = 0;                              // Send the first byte to the TX Buffer: Data[7:0]
    while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
    dummy_rx = UCB1RXBUF;			// Dummy Read Rx buf
    
    P4OUT|=0x01;  // set HIGH at end of transmission
  
    retVal = (SPI_Rx_buf[1]<<16)|(SPI_Rx_buf[2]<<8)|(SPI_Rx_buf[3]);
    P4OUT |=BIT0;	// Set STE high
    return 	retVal;
}
/**********************************************************************************************************
* Set_GPIO														                                          *
**********************************************************************************************************/
void Set_GPIO(void)
{
  //port set..
  //Port 1.1 - AFE_RESETZ, P1.2 - AFE_PDNZ, P2.3 - ADC_RDY, P2.4- PD_ALM, P2.5 - LED_ALM,
  //P5.7 - DIAG_END
  
  P2DIR &= ~(AFE_ADC_DRDY + AFE_PD_ALM + AFE_LED_ALM + AFE_RESETZ + AFE_PDNZ + AFE_DIAG_END);
  P2OUT |= (AFE_RESETZ + AFE_PDNZ);
  P1DIR |= BIT0;
  P1SEL |= BIT0;
  
  P2SEL = 0x00;
  P2DIR &= BIT0;
  P2OUT |= (BIT1 + BIT2 + BIT7);
  P2DIR |= (BIT1 | BIT2 | BIT7);
}

/**********************************************************************************************************
* Set_UCB1_SPI													                                          *
**********************************************************************************************************/
void Set_UCB1_SPI(void)
{ 
    P4SEL |= BIT1+BIT2+BIT3;  			// Set SPI peripheral bits
    P4DIR |= BIT0+BIT1+BIT3;			// STE, SCLK, and DOUT as output
    P4DIR &= ~BIT2;                         	// Din as input
   // P4OUT|=BIT0;				// Set STE high
  
   
    UCB1CTL1 |= UCSWRST;               		// Enable SW reset
    UCB1CTL0 |= UCMSB+UCCKPH+UCMST+UCSYNC;	// [b0]   1 -  Synchronous mode
                                                // [b2-1] 00-  3-pin SPI
                                                // [b3]   1 -  Master mode
                                                // [b4]   0 - 8-bit data
                                                // [b5]   1 - MSB first
                                                // [b6]   0 - Clock polarity high.
                                                // [b7]   1 - Clock phase - Data is captured on the first UCLK edge and changed on the following edge.
  
    UCB1CTL1 |= UCSSEL_2;               	// SMCLK
    UCB1BR0 = 0x01;                             // 8 MHz
    UCB1BR1 = 0;                                //
    UCB1CTL1 &= ~UCSWRST;              		// Clear SW reset, resume operation
    UCB1IE =0x0;
}
// Port 2 interrupt service routine
#pragma vector=PORT2_VECTOR  //DRDY interrupt
__interrupt void Port_2(void)
{
  
  switch (P2IV)
  {
  case P2IV_P2IFG5:
    P2IFG &= ~BIT5;                                   // Clear P2.3 IFG i.e Data RDY interrupt status
    //P5OUT |= BIT0;                                    //Turn on LED P5.0 (Green)
    AFE44xx_Data_buf= AFE44xx_Reg_Read(44);
    //x=pow(2,21);
   // AFE44xx_Data[index++]=AFE44xx_Data_buf*1.2/pow(2,21);
    
    //if(index==1024)
        {
          readDataFlag = 1; 
          //for(i=0;i<2048;i++)
          {
           //hyperterminal_trans(AFE44xx_Data_buf[i]);
          }
          //index=0;
        } 
  
    readDataFlag = 1;                                 // Set Flag to read AFE44x0 ADC REG data
    
    break;
    
  case P2IV_NONE:
    break;
  }
}
/**********************************************************************************************************
* Enable_AFE44xx_DRDY_Interrupt												                                          *
**********************************************************************************************************/
void Enable_AFE44xx_DRDY_Interrupt (void)
{
    P2IFG &= ~AFE_ADC_DRDY;                           	// P2.3 IFG cleared
    P2IE |= AFE_ADC_DRDY;                             	// P2.3 interrupt enabled
}

void Disable_AFE44xx_DRDY_Interrupt (void)
{
    P2IFG &= ~AFE_ADC_DRDY;                           	// P2.3 IFG cleared
    P2IE &= ~AFE_ADC_DRDY;                             	// P2.3 interrupt disabled
}
void Init_AFE44xx_DRDY_Interrupt (void)
{
    P2DIR &= ~AFE_ADC_DRDY;
    P2REN |= AFE_ADC_DRDY;                              // Enable P2.3 internal resistance
    P2OUT |= AFE_ADC_DRDY;                            	// Set P2.3 as pull-Up resistance
    P2IES |= AFE_ADC_DRDY;                              // P2.3 Hi/Lo edge
    P2IFG &= ~AFE_ADC_DRDY;                           	// P2.3 IFG cleared
    P2IE &= ~AFE_ADC_DRDY;                             	// P2.3 interrupt disabled
    
}
    
    
    //...........................
    void TI_AFE_SPIWriteReg(char addr, unsigned long data)     //old code
{

  //char inst;
  P4OUT&= ~0x01;   //  SEN LOW FOR TRANSMISSION.   
  
 //for(unsigned int i= 0 ; i <= 1400; ++i);
  //inst = AFE_WRITE_BIT & addr;  
  while ( (UCB1STAT & UCBUSY) );// USCI_B1 TX buffer ready?
  UCB1TXBUF=addr;
 
  while ( (UCB1STAT & UCBUSY) );// USCI_B1 TX buffer ready?
  UCB1TXBUF = (unsigned char)(data >>16);     // Send the second byte to the TX Buffer: Data[23:16]
  while ( (UCB1STAT & UCBUSY) );		// USCI_B1 TX buffer ready?
  UCB1TXBUF = (unsigned char)(((data & 0x00FFFF) >>8));       // Send the third byte to the TX Buffer: Data[15:8]
  while ( (UCB1STAT & UCBUSY) );		                // USCI_B1 TX buffer ready?
  UCB1TXBUF = (unsigned char)(((data & 0x0000FF)));           // Send the first byte to the TX Buffer: Data[7:0]
  while ( (UCB1STAT & UCBUSY) );		                // USCI_B1 TX buffer ready?
  P4OUT|=BIT0;				// Set STE high
  
  
  
 
}


/*void Init_Clock(void)
{
    //Initialization of clock module
  //  if (USB_PLL_XT == 2){
	//	#if defined (__MSP430F552x) || defined (__MSP430F550x)
			P5SEL |= 0x0C;                                      //enable XT2 pins for F5529
		//#elif defined (__MSP430F563x_F663x)
		//	P7SEL |= 0x0C;
		//#endif

        //use REFO for FLL and ACLK
        UCSCTL3 = (UCSCTL3 & ~(SELREF_7)) | (SELREF__REFOCLK);
        UCSCTL4 = (UCSCTL4 & ~(SELA_7)) | (SELA__REFOCLK);

        //MCLK will be driven by the FLL (not by XT2), referenced to the REFO
 //       Init_FLL_Settle(USB_MCLK_FREQ / 1000, USB_MCLK_FREQ / 32768);   //Start the FLL, at the freq indicated by the config
                                                                        //constant USB_MCLK_FREQ
   //     XT2_Start(XT2DRIVE_2);                                          //Start the "USB crystal"
 //   } 
	//else {
	//	#if defined (__MSP430F552x) || defined (__MSP430F550x)
			P5SEL |= 0x10;                                      //enable XT1 pins
	//	#endif
        //Use the REFO oscillator to source the FLL and ACLK
        UCSCTL3 = SELREF__REFOCLK;
        UCSCTL4 = (UCSCTL4 & ~(SELA_7)) | (SELA__REFOCLK);

        //MCLK will be driven by the FLL (not by XT2), referenced to the REFO
//        Init_FLL_Settle(USB_MCLK_FREQ / 1000, USB_MCLK_FREQ / 32768);   //set FLL (DCOCLK)

    //    XT1_Start(XT1DRIVE_0);                                          //Start the "USB crystal"
  //  }
}*/

over 9 years ago

0 Ilmars over 9 years ago

Guru 46710 points

Does it behave the same way when you uncomment low level init function which disables watchdog timer early?
/*int low_level_init(void){
WDTCTL=WDTPW+WDTHOLD;
return 1;
}*/

0 Arnab Chakraborty over 9 years ago in reply to Ilmars

Intellectual 635 points

Ya with those lines uncommented also the program is behaving the same way.Can you please check it on your side and rectify the issue?

Thanks

Arnab

0 Ilmars over 9 years ago in reply to Arnab Chakraborty

Guru 46710 points

>Can you please check it on your side and rectify the issue?
No. Why should I?
One more thing you shall check: debugger options. "Run into main()" shall be enabled. Also check that CPU type is set properly, check stack size and it's usage. Also check where exactly debugger program is stuck in the infinite loop, what part of your or library/startup code it is, try to think of reasons why it is stuck there.

0 Arnab Chakraborty over 9 years ago in reply to Ilmars

Intellectual 635 points

I have checked that my program is everytime stuck at __data20_memzero: section but couldn't figure out whats the reason. I checked the stack also but there is no overflow there. I checked the debugger options also and there Run to main() is enabled.I am sending the screenshot. Please let me know if you can figure out the same.

Thanks

Arnab

0 Ilmars over 9 years ago in reply to Arnab Chakraborty

Guru 46710 points

Your debugger screen shows "Fet Connection Lost". It means that for some reason your chip/program is reset, most probably stuck in continuous reset/crash loop - that's why you think it is looping in the init part of the code. Typical reason is Watchdog kicking in before C init is done due to huge size of variable memory. In your case I see two double arrays of 700 elements. This is huge for msp430 at default 1MHz.

Your problem most probably is improper name of low level init function. It shall look like this:

int __low_level_init(void) {
WDTCTL = WDTPW + WDTHOLD;
return 1;
}

0 Arnab Chakraborty over 9 years ago in reply to Ilmars

Intellectual 635 points

Actually I had taken the screenshot in my PC after disconnecting the debugger from my board. Thats why you see the message FET connection lost. I will change the low_level_init syntax and see if it works.

Thanks

Arnab

0 Arnab Chakraborty over 9 years ago in reply to Ilmars

Intellectual 635 points

The problem got resolved. Thanks for your prompt response.

Thanks

Arnab

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MSP430 program automatically running after dumping without me pressing the run button