Constant Generators

A Double-Operand Instruction using Immediate Mode as the Source Operand usually requires an extra word to specify the Source Operand itself (a constant).

However, for the most commonly used constants, 0, 1, 2, 4, 8, and -1 (0xFFFF), using the "constant generator" can eliminate that extra word in the instruction. This makes the code size smaller and execution faster.

In most MSP430 tool chains, this is done automatically. That is, when the source code uses one of those commonly used constants, the assembler/compiler generates an object code using the constant generator.

There are two unfortunate exceptions, they occasionally still generate instructions with extra constant word when they could have used the constant generator. They did that as a work-around for a bug in some of the earlier MSP430. For MSP430 without that bug, these tool chains still work around an imaginary bug.

I addition to the above explanations I might add some more in-depth details:

If an instruction only requires input and output from a register, it can be executed in one MCU cycle. Actually, two cycles are required, one for fetching the instruction from flash, one for executing it, but since the MSP fetches the next isntruction while executing the last, it' sone cycle only.

Yet registers are used for more than just a data source. Thy can be used as index, absolute or relative address poitners etc. Since this usage makes no sense for the status register, using the status register in one of these addressing modes will instead return a fixed value, a constant. Since there are 4 of these addressing modes, and one are still required for accessing the SR normally /register mode) and one for the absolute mode &xxxx which is done with SR in indexed mode (xxxx(SR)), the R3 register is also used for constant generation. It cannot be used for anything else. So 6 constants are available, which are addressed by addressing R2 or R3 with one of the 4 addressing modes instead of adding an immediate constant value to the code itself. Effectively these 6 values are hardcoded into the instruction word itself. No additional data word to read from flash, one less MCLK cycle to execute. Especially usefule for all those INC and DEC, DINT, EINT instructions one needs so often. They all can be emulated by an OR or ADD instruction using one of the constants (the GIE bit is #8).

The exception mentioned by OCY is the push/pop instruction which cannot use the SR/R2 for the constant generation when pushing a value on stack. Since this affects only the value #4 and #8 which are really seldom pushed on the stack (0 and -1 are way more common), it's not a big drawback.

Sicne all this usage of the constant generator is automatically done by the assembler, you usually don't need to think about it. Only that you cannot access R2 other than directly and r3 not at all. At least not with the normal results.

If one writes
dint
this is equal to
BIC #8,SR
and the compiler silently generates
BIC @SR+,SR
where using SR with the indirect autoincrement addressing mode returns the constant #8 instead of doing some stupid memory reading. And takes only 2 bytes and 1 cycle instead of 4 bytes and 2 cycles.

Since all instructions are numbered with an orthogonal scheme, in this case 4 bit for the BIC command (0xC), 4 bit for the source register number, 4 bits for the source and destination addressing modes and the operand width (byte/word) and finally 4 bits for the destination register number, you can verify this mechanism by looking at the generated binary value.