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MSP432P401R: Missing GPIO pins in the MSP432p401R Launchpad for SPI communication

Part Number: MSP432P401R

Fellow MSP users,

I tried implementing a SPI communicaion with a SD card using the above MCU but found unable to do it since a required pin for clock output was missing in the 3rd port (P3.1).

So I tried moving to Port 2, but found the P2.1  (UCAxCLK) pin missing again. I looked into some graphical maps of the pin configuration and found that the SCK pin was given in the P5.1 pin,

but the Port 5 doesn't provide with SPI compatibility according to Technical Guide (slau356) and User Guide (slau597b). Why are some pins missing? How can I solve this problem (that is finding a pin to get

the clock output pin)?

Graphical pin configuration

energia.nu/.../2016-06-09-LaunchPads-MSP432-2.0-—-Pins-Maps.jpg

The programming was done at register level due to driverlib.h malfunctioning so I have a general idea about the SPI and Clock System in MSP432 .

I haven't completed the code yet.

Please can some person with an expirienced knowledge help me with the issue.

(This is my first time using a MSP MCU).

Best regards,

Inoth Munisinghe.

  • I would recommend using the USCIB0 instance which is found on Pins 1.5,1.6, and 1.7.

    http://www.ti.com/lit/ug/slau597b/slau597b.pdf#page=16

    Regards,
    Chris

  • If I remember right, MSP432 has 2 ports with mapping, so it should be possible to map any peripheral pins to any pin of this 2 ports.
  • Thank you Chris Sterzik for your replying,

    I looked into the P1-5,6,7 but it doesn't provide with the STE pin for enabling the slave.
    I'm sorry for not mentioning this, but for the SD card, I'm using the 4 wire SPI communication. So it needs the STE pin.
  • Thank you for replying zrno soli,

    Even when using the B module I couldn't find a full set of pins for 4 wire communication.
    But I found P2 containing a set of 4 pins, but the register were named PM_UCA1STE, CLK and so on. I know that 'PM' stands for Port Mapping but I don't know what Port Mapping does or whether it would change the behaviour of a normal SPI handling register (ex : UCA1STE)

    Regards,
    Inoth Munisinghe.
  • An example of port mapping can be found here: dev.ti.com/.../

    Also, if you look into the header file (msp432p401r.h) you can see that the following definitions can be applied:

    #define PMAP_UCA1STE 7
    #define PMAP_UCA1CLK 8
    #define PMAP_UCA1RXD 9
    #define PMAP_UCA1SOMI 9
    #define PMAP_UCA1TXD 10
    #define PMAP_UCA1SIMO 10
    #define PMAP_UCA2STE 11
    #define PMAP_UCA2CLK 12
    #define PMAP_UCA2RXD 13
    #define PMAP_UCA2SOMI 13
    #define PMAP_UCA2TXD 14
    #define PMAP_UCA2SIMO 14
    #define PMAP_UCB2STE 15
    #define PMAP_UCB2CLK 16
    #define PMAP_UCB2SDA 17
    #define PMAP_UCB2SIMO 17
    #define PMAP_UCB2SCL 18
    #define PMAP_UCB2SOMI 18

    Regards,
    Chris

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