Tool/software: Code Composer Studio
I am currently stuck at this UCRXIFG polling condition. The code gives +++ to a xbee and waits for the OK response from the device. I am using a different clock structure for my system, XT1 = 32K and XT2 = 32M. Is some setting wrong in the clock configuration because the UART calculations are correct to the best of my knowledge. Attaching my code for referral
#include <stdio.h> #include <msp430.h> void vGpio_Init(void) { // Configure all GPIO to Output Low // Make sure there is no pin conflict with respect to schematic P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00; P5OUT = 0x00; P6OUT = 0x00; P7OUT = 0x00; P8OUT = 0x00; P9OUT = 0xFF; P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF; P4DIR = 0xFF; P5DIR = 0xFF; P6DIR = 0xFF; P7DIR = 0xFF; P8DIR = 0xFF; P9DIR = 0xFF; } void vMspclock_init(void) { //----------- //General Settings P7SEL |= BIT2+BIT3; // Port select XT2 UCSCTL6 &= ~XT1OFF; // Enable XT1 for RTC_B UCSCTL6 |= XCAP_3 | XT1BYPASS; //Internal load cap 12pF configuration UCSCTL6 &= ~XT2OFF; // Enable XT2 for MCLK, SMCLK, ACLK UCSCTL3 |= SELREF_2; // Reference to FLL is given from XT2 UCSCTL6 |= XT2DRIVE_3; //Selecting high current drive capacity and current consumption for 32 MHz crystal //UCSCTL7 //This register is used to check oscillator fault flag, ie if there is some error in the osc due to supply conditions //Init MCLK UCSCTL4 |= SELM_5; //Uses XT2(32MHz) crystal oscillator source UCSCTL5 |= DIVM_3; //Divides the clock source by 32, ie. 32/1 = 32Khz //Init SMCLK UCSCTL4 |= SELS_5; ////Uses XT2(32MHz) crystal oscillator source UCSCTL5 |= DIVS_0; //Divides the clock source by 1, ie. 32/1 = 32Khz //Init ACLK UCSCTL4 |= SELA_5; ////Uses XT2(32MHz) crystal oscillator source UCSCTL5 |= DIVA_3; //Divides the clock source by 8, ie. 32/8 = 4Khz //UCSCTL5 |= DIVPA_3; //This can divide the ACLK source available at external pin by any value like previous line do { UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags }while (SFRIFG1&OFIFG); // Test oscillator fault flag } void vUART_INIT(void) { P8SEL |= 0x04; //For TX pin P8DIR |= 0x04; P8SEL |= 0x08; //For RX pin UCA1CTL1 |= UCSWRST; //Essential to set this bit as all the registers are configurable only when UCSWRST = 1 UCA1CTL1 |= UCSSEL__SMCLK; //CAN also be written as UCA0CTL1 |= UCSSEL_1;//to SELECT THE CLOCK SOURCE OF THE UART communication //For reference of calculation - processors.wiki.ti.com/.../USCI_UART_Baud_Rate_Gen_Mode_Selection UCA1BR0 = 0x52; //These 2 registers represent the calculation for the baud rate according to the frequency of the clock UCA1BR1 = 0x00; //32000000/16*(1/38400)=52, so lsb = 52 and msb =0 UCA1MCTL = UCOS16 | UCBRF_1; //first setting sets the oversampling mode, second bit is the calculation for the UCBRF //UCA1MCTL = UCBRS_2; UCA1CTLW0 &= ~UCSWRST; //Clearing the register to start the UART configuration } /** * hello.c */ int main(void) { WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer char send_init[3]={'+','+','+'}; int i; char rxbit; vGpio_Init(); vMspclock_init(); vUART_INIT(); for(i=0;i<3;i++) { while(!(UCA1IFG & UCTXIFG)); //Poll for transmit interrupt flag UCA1TXBUF = send_init[i]; // Transmit data UCA1IFG &=~(UCTXIFG); } for(i=0;i<10000;i++); //waiting for the ok responce for(i=0;i<3;i++) { while(!(UCA1IFG & UCRXIFG)); //Poll for transmit interrupt flag----CODE STUCK HERE rxbit = UCA1RXBUF; UCA1IFG &=~(UCRXIFG); printf("%d ", rxbit); } printf("Hello World!\n"); return 0; }
I am a newbie and any help would be appriciable
Onkar