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Part Number: MSP432P401R
Tool/software: TI-RTOS
Using CCSv8 (latest), v2.10 of the Simplelink SDK. TI Resource Explorer exampls.
When creating some new labs for the TI-RTOS workshop on Simplelink, I ran into a problem with the execution graph - or maybe it is just my interpretation of the numbers.
Using the native (SYS/BIOS) Clock example from Resource Explorer, I get the following picture. It shows five "ticks" with Clock set up as the default 1000us (1ms) and then the clock function runs. Perfect. Until you benchmark the TIME between each clock tick - which according to the graph is 47us. It should be 1000us (1ms). I am sure the clock is going off at a 1ms rate, but why does the graph show every 47us?
So two questions:
- Why is 47uS really 1000us? How do I interpret this?
- If there is an interpretation, why is the Execution Graph "wrong" and does not display "correct" data? Is there a way to force it to show 1000us ticks vs 47us ticks?
Hi Eric,
Can you please attach the clock.cfg that you modified to add UIA to the Clock example?
Also, I think you must have modified clock.c. Otherwise the example would have finished and exited at 11 msec - but your snapshot looks to have run for 300+ msec. Can you please attach the .c file too? Or, the whole project?
Also, what version of CCS are you using?
And, have you seen this behavior on more than one Launchpad, or in a different CCS setup?
I just tried adding UIA and running the Clock example and the output looks fine with my setup:
Thanks,
Scott
Scott,
I just killed my project and reloaded it untouched other than adding UIA and enabling Logs and choosing "SWI context" in LoggingSetup.
I saw the same behavior again. I have 10+ projects in my Explorer open, so I thought "huh, maybe I was touching another .cfg file or modifying other source files." So I double checked and I get the same behavior.
I then tried the same Clock example on the P4111. No mods other than adding UIA (graph buffer to 8192), logs enabled. Clock module is still set to 1000uS default. The graph is above. 188uS. Still off. And I didn't see all five clocks...just three of them. Odd. With a large buffer, I thought I would see them all.
This is still a mystery.
Hi Eric,
Thank you for sending the .cfg file and your additional notes. I tried your file and didn’t see any issue.
My installation had slightly newer SDK and CCS, so this morning I did some installs to use your same setup. (I didn’t yesterday because I knew there hadn't been any relevant changes to the kernel since your release.) With the same set of components I do see bad timing values in the execution graph, same as you.
Asking around, this is a known bug in a plugin in CCS 8.0.0.00016. The bug ID is: DVT-1968. The bug has been fixed in CCS 8.1, which should be formally released in June. The bug arrived in CCS8, it does not affect CCS6 or CCS7.
Sorry for the time you spent on this, and that I can’t point you to a release with the fix yet.
Best regards,
Scott
Thanks Scott. At least you solved the mystery. Ok, I will wait until June to update the screen shots and labs for this new workshop.
We actually saw wrong values in CCSv7.4 on the P4111 LP. Attached is a screen shot. 78uS should be 1000uS. FYI.
Again Scott, thanks for checking into this. I appreciate it.
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