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Part Number: MSP432P401R
Tool/software: TI-RTOS
As of now, using the P401R LP and adding Timestamp module to the .cfg file, I get an 85% (or higher) CPU load where it should be less than 1%. I saw this on the CC2650 earlier and it was due to Timestamp defaulting to RTC (ACLK) at 32KHz.
For MSP432P401R, when you add Timestamp to the .cfg file, which clock is it using by default and how to you modify the clock source if needed? I suspect it is using ACLK (32KHz) because it is showing 85%+ CPU usage and I need to use SMCLK running at CPU Frequency.
For the CC2650, adding THIS line to the .cfg file fixed the problem:
Timestamp.SupportProxy = xdc.useModule('ti.sysbios.family.arm.m3.TimestampProvider');
I tried this...but it didn't work like it did for the CC2650. I do see the "Clock Freqs" module the reports ACLK=32768, SMCLK=3MHz, HSMLCK = 3MHz, while the BIOS Runtime clock freq reports the default as 48MHz. This is a bit confusing as well.
This project was derived from the SDK, TI driver, empty project along with its dependent BIOS project. So this is what the release.cfg file was reporting to me with no modifications.
Thanks,
Eric,
I think we know what's causing the high CPU load. Its because the chip is going into low power.
CPU load calculation uses the number of times the idle loop ran within a given period.
When the chip goes into low power, the the idle loop is not executed very often causing the CPU load to appear very high.
Its not recommend to use CPU load with power enabled. You can disable the Power policy by modifying the following config in your board.c file:
const PowerMSP432_ConfigV1 PowerMSP432_config = {
.policyInitFxn = &PowerMSP432_initPolicy,
.policyFxn = &PowerMSP432_sleepPolicy,
.initialPerfLevel = 2,
.enablePolicy = false,
.enablePerf = true,
.enableParking = true
};
Hope that helps.
Judah
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