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Tool/software: Code Composer Studio
Hi, Friends.
I have issue with my device.
The device is built on the msp430f5510 and is powered by a 3.6 V battery.
To the 5510 via SPI (USCI_B-based) are connected the flash memoryAT25256B-SSHL-T and the cc1120 radio module. Also through USCI_A there is a periodic poll on UART protocol Modbus.
To the MCU an external quartz (32768 Hz) is connected, from which ACLK and RTC_A are powered.
I decided to use MCLK = 8 MHz, SMCLK = 4 MHz, ACLK = XT1 = 32768 Hz.
This should improve the processing speed of information and allow the chip to go faster to LPM3. Since according to the datasheet the typical consumption at a frequency of 1 MHz is 0.25 mA, at a frequency of 8 MHz = 1.55 mA, which gives a difference of 6.2 in favor of 1 MHz. But the processing speed at 8 MHz is 8 times higher, which will allow the chip to process the commands in a shorter period of time and fall asleep.
Flash memory with a voltage of 1.8 V can operate at a frequency of 5 MHz. Therefore, I want to lower the SMCLK frequency to 4 MHz, which will allow to keep the flash and radio module operability when the battery voltage drops, also at a high level.
Based on the above, I get the following situation.
1) I can not correctly calculate the register values for the 8MHz frequency.
P5SEL |= BIT4+BIT5; //Enable XIN XOUT on P5.4 и P5.5 UCSCTL6 |= XT2OFF; //Desabling XT2 UCSCTL6 &= ~(XT1OFF); //Enable XT1 UCSCTL6 |= XCAP_3; //Use internal cap UCSCTL3 = SELREF_2; // DCO FLL reference = REFO UCSCTL4 = SELA_0; //ACLK = XT1 UCSCTL0 = 0x0000; // //Wait for ocs stabilization do{ UCSCTL7 &= ~XT1LFOFFG; // Clear XT1 fault flags } while (UCSCTL7 & XT1LFOFFG); __bis_SR_register(SCG0); //Disabling FLL control UCSCTL1 = DCORSEL_5; // Select DCO range 16MHz UCSCTL2 |= 249; // Set DCO multifier for 8MHz // (N + 1) * FLLRef = Fdco // (122+1) * 32768 = 4030464 // (249 + 1) * 32768 = 8192000 is not 8MHz and up for power is 1,8V !!! __bic_SR_register(SCG0); // Enable control FLL // Worst-case settling time for the DCO when the DCO range bits have been // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx // UG for optimization. // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle __delay_cycles(250000); /* ******** Init USCI_B UART Mode ******* */ UCA1CTLW0 |= UCSWRST; //Reset UART UCA1CTLW0 |= UCSSEL__SMCLK; //CLK = SMCLK // Calculate port speed // 8000000/(16*9600) = 52 // Use table 34-6 in Family User Guide UCA1BR0 = 52; //8000000/16/115200 UCA1BR1 = 0x00; UCA1MCTL |= UCBRS_6 + UCBRF_0 + UCOS16; //Set modulation, UCA1CTL1 &= ~UCSWRST; //Starting UART UCA1IE|=UCRXIE; //Wait incomming request UCB1CTL1 |= UCSWRST; // reset SPI UCB1CTL0 |= UCCKPH + UCMSB + UCMST + UCSYNC; //Clock Phase + First MSB + SPI master + Synhro mode UCB1CTL1 |= UCSSEL_2; // CLOCK = SMCLK UCB1BR0 = 0x52; // By table 39-5 UCB1BR1 = 0; // //UCB1MCTL = 0; // Clear SPI UCB1CTL1 &= ~UCSWRST; // USCI Start UCB1IE |= UCRXIE;
But according to my calculations, the MCU frequency is not 8,000,000, but 8,192,000.And so the dividers obtained are not applied correctly.
And at 1.8V power the DCO frequency can not be 8192000. And I also do not understand how to correctly set the SMCLK frequency to 4 MHz, for spi.
2) And then there is the question of the correct setting of SPI, if there is a conflict with the flash memory and the cc1120 chip during my conflict settings. Whether they have the same SPI port modes, or cc1120 will accept what msp430f5510 indicates and I can specify the settings for the flash.
I'm sorry, but I'm new to programming chips. and there are difficulties with English, so I use a google translator. But I need to modify the firmware of the device within a week. Therefore, for correct operation, I want to properly configure all the modules, and then finish the functionality.
Thank you in advance for your cooperation.
Hi,
let me quickly repeat your questions to make sure I've understood your needs correctly:
1) You need the DCO frequency to be 8MHz and are unsure about the correct register settings.
2) You want SMCLK to be 4MHz and are unsure how to properly configure it.
3) You need guidance on the correct SPI setup.
1) Note, that the DCO is specified with some tolerances and rather gives a certain frequency range than an exact 8000000Hz. Therefor, as you've followed the User's Guide reference, you've per se configured the DCO correctly. For more trust in the actual DCO frequency you could use the DCO calibration.
2) The best way to achieve a 4MHz SMCLK is to clock it from the 8Mhz DCO and use the clock divide of 2. This is indicated in the User's Guide, you'll basically just need to set DIVS accordingly.
3) I am not sure if I fully understood your challenge. I'd assume the MSP430 would act as SPI master while the Flash memory and the CC1120 act as SPI slaves. Have you had a look at the Code examples for SPI master configuration? I'd suggest you to start from there.
Please let me know if this works for you and how to further help you to get started.
Thanks and best regards,
Britta
Hi,
Britta, that's right. MCU is an SPI master. I looked at the examples of settings in this mode. But the question boils down to whether the regimes for flash memory and radio module are consistent. Because processing calls to them is supposed to be made on the flag in the form of a variable, set via timer interrupts.
For example, to call the function of working with the radio module via the RTC_A interrupt alarm, I will set the flag in the "radioTime" variable once a day. And to write to the flash, I will set the "flashTime" flag every 10 minutes. And to record on the flash.
In this case, I'm wondering if I will have to change the SPI port settings when accessing the flash and the radio module.
And in the current issue, current configure UART module to 9600 baudrate.
And what about the speed of data processing? Will this allow me to reduce energy consumption. And will there be any delays necessary to stabilize the processor frequency? That is, when CPU exit from LPM3, it's need time to overclock the frequency, or am I worried in vain? :)
Thanks in advance.
Hi,
In the issue I wish correctly set SPI interface. With cc1120 I will work in the Standart FIFO mode, about this mode I'm read in User Guide. And my code is based on the TI Examples for 1120. Now I found the old code for the device, and there saw the setting of the SPI. It is the same for both external flash and cc1120.
At the moment I'm dealing with work over SPI with cc1120. I want to configure one of the pins MCU on the input (in current MCU P2.0 is conected with GPIO3 of cc1120). Therefore I'm set
P2SEL = 0x00; P2DIR = 0xFE; P2REN = 0x00; P2IES = 0x01; P2IE = 0x01;
and
{ CC112X_IOCFG3, 0x06 },
and want get IRQ of the end of TX or RX. Then read MARK_STATUS and if the operation was successful, then go to sleep.
in the process I will write), if questions are being asked.
Best reards,
and many Thanks
Hi,
I will try to make full clarity.
I have a complete device. The device layout has been developed for a long time and there is currently no possibility to make changes to it.
And so in the scheme is used msp430f5510, сс1120, at25256.
Next pair of connections:
P5.0 CS for Flash,
P5.1 CS for сс1120.
MSP430 P2.0 - GPIO3 from 1120
MSP430 P5.2 - GPIO2 from 1120
MSP430 P4.0 - GPIO0 from 1120
MSP430 P4.1 MOSI
MSP430 P4.2 MISO
MSP430 P4.3 CLK
The 3-wire SPI bus is common for at25256 and 1120.
Therefore, I also had a question about the correct setting of the SPI for at25256 and cc1120.
But after looking at the code samples for 1120 on the your site and comparing them with the code for the device developed by another specialist of our company before me, I saw that the settings are the same for at25256 and cc1120. The main thing is not to feed simultaneously 0 to both CS). Then without reconfiguring the port, we can switch between flash or cc1120.
At the moment, in the settings of msp430 I set the interrupt handling on port 2, that is P2IE = 0x01; P2IES = 0x01; for look interrupt on P2.0 for the rising edge. At the GPIO3 of the module 1120, the signal was set at the end of the reception or transmission, for this purpose the value of 0x06 was written to the register of {CC112X_IOCFG3, 0x06}.
Accordingly, relying on code samples from Texas, I write my code.
Next, there is a small question. While studying the header file to msp430f5510, I did not find the interrupt registers for port 4 and port 5 (no P4IE and P5IE, and there are no P4IES and P5IES. And if I understand correctly, then I can not track interrupts on these P4 and P5 ports in I / O mode (P4SEL = 0x00; P5SEL = 0x00)?
Best reards,
and many Thanks
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