MSP432P401R: UART A3: Detecting Dropped Bytes (UCOE) when sending and receiving simultaneously

When sending and receiving simultaneously on the UART using interrupts, I am detecting UCOE receive buffer overruns at an unacceptable rate (several per minute). 

No other interrupts are enabled, this is the only task being performed by this device. The baud rate is 115.2Kbps on UART3. All bytes that do come through are correct.

See code below. My development environment is IAR ARM 7.80.3. Any help would be greatly appreciated, thanks -David 

//////INIT CODE BEGIN//////////////////

const eUSCI_UART_Config uartA3Config =
{
        EUSCI_A_UART_CLOCKSOURCE_SMCLK,         
        13,                                      // BRDIV = 13
        0,                                       // UCxBRF = 0
        37,                                       // UCxBRS = 0
        EUSCI_A_UART_NO_PARITY,                  // No Parity
        EUSCI_A_UART_LSB_FIRST,                  // LSB First
        EUSCI_A_UART_ONE_STOP_BIT,               // One stop bit
        EUSCI_A_UART_MODE,                      // UART mode
        EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION  // Oversampling
};

    P9DIR |=  BIT7;
    MAP_GPIO_setAsPeripheralModuleFunctionOutputPin( GPIO_PORT_P9,
                                                    GPIO_PIN7,
                                                   GPIO_PRIMARY_MODULE_FUNCTION);
    P9DIR &=~BIT6;
    MAP_GPIO_setAsPeripheralModuleFunctionInputPin( GPIO_PORT_P9,
                                                   GPIO_PIN6,
                                                   GPIO_PRIMARY_MODULE_FUNCTION);
    MAP_UART_initModule(EUSCI_A3_MODULE, &uartA3Config);
    MAP_UART_enableModule(EUSCI_A3_MODULE);

////// INIT CODE END//////////////////

//////INTERRUPT HANDLER BEGIN //////////

char test_buf[256] = {0};
char buf_beg = 0;
char buf_end = 0;
unsigned short test_crc = 0;

int overflowCounter = 0;
int rxErrCounter = 0;
unsigned int count = 0;
// UART A2: Fast Steering Mirror Comm
void UARTa3_isr(void)
  {   
  if(UCA3IFG & UCRXIFG)
    {    
    if ((UCA3STATW & UCOE) != 0)
      {
      overflowCounter++;
      }
    
    if ((UCA3STATW & UCRXERR) != 0)
      {
      rxErrCounter++;
      }
    
    inbufS15[ibufS15] = UCA3RXBUF;
    ibufS15++;   
    if(ibufS15 >= INBUFS15LGTH) 
      {
      ibufS15 = 0;
      s15_charcount+=512;
      }         
    }
  
  if(UCA3IFG & UCTXIFG)
    {          
    if (buf_beg < buf_end)
      {      
      UCA3TXBUF = test_buf[buf_beg++];
      }
    else
      {      
      UCA3IE &= ~UCTXIE;
      UCA3IFG &= ~UCTXIFG;
      buf_beg = 0;
      buf_end = 0;
      }
    }
}
//////INTERRUPT HANDLER END //////////

//////MAIN LOOP BEGIN //////////
    while (1)
      {      
      if ((buf_beg < buf_end) && !(UCA3IE & UCTXIE))
        {
        UCA3IE |= UCTXIE;
        UCA3TXBUF = test_buf[buf_beg++];
        }
      
      ProcessInputBytes(); 
      
      if (buf_beg == 0 && buf_end == 0)
        {
        memset(test_buf, 0x00, sizeof(test_buf));
        
        test_buf[buf_end++] = count;
        test_buf[buf_end++] = count >> 8;
        test_buf[buf_end++] = count >> 16;
        test_buf[buf_end++] = count >> 24;
        count++;
        }
      }
    
//////MAIN LOOP END /////////////