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MSP430FR5994: CTPL library operation

Rosh Mendis
Intellectual 730 points
Part Number: MSP430FR5994

Hi,

I'm using the MSP430FR5994 launchpad. using CCSv8 and fram-utilities.

A few basic questions (apologies if they seem obvious) regarding the CTPL (compute through power loss) library:

  1. I noticed the CTPL library for the MSP430FR5994 is missing backup/restore support for the LEA peripheral. Is this because all of LEA's state is in the SRAM, and backup of the SRAM is sufficient to retain state of LEA ?
  2. Some of the peripheral registers seem to be backedup/restored in a particular order. is the backup/restore order of the different registers of a peripheral (e.g. DMA) important ?
  3. Similar to the above - why is the 'order' of the different peripherals important when backing-up/restoring ?
  4. What happens to the interrupts & interrupt handling during power loss ? Are the order of interrupts, interrupt priorities , interrupt queue etc. all lost ? Does restoring the peripherals imply that the interrupts are also restored correctly ?
  5. Can we use CTPL to backup external peripherals (e.g. wifi transceiver )?

Thank you !

  • 0
    Guru 26200 points
    Hi Rosh,

    there are always some trade offs.
    How do you detect power loss? How much time do you have to switch into LPMx.5?

    ad 1) I know some cases when LEA 55 ms to complete its task when taking 1.5 mA. I am pretty sure that LEA SRAM memory backup is insufficient. Probably there is now LEA backup/restore because it takes time, just trade off.
    ad 2) Yes. This order is critical. You will find why in this manual: www.ti.com/.../slau367o.pdf
    ad 3( like above
    ad 4) How do you understand "power loss"? Your program flow decides what would be lost.
    ad 5) Yes, you can. It is programming and everything is possible.
  • 0 in reply to Tomasz Kocon
    Intellectual 730 points

    Hi Tomasz,
    I couldn't find anything specific related to (2) + (3) - order of the registers / peripherals, in the manual. Can you please point me to the page you are referring to please ?

    (4) power loss = for example in a energy harvesting scenario, in certain conditions, the power level would drop (speed may vary but lets say within 100's of milliseconds) until complete complete power failure.assume detection is via the on-chip comparator as in the CTPL examples.

    Shouldn't the backup procedure work regardless of program flow ? for example lets say we have a sensor, collect data, do processing (e.g. filtering) and transmit data. assuming there are interrupts for collecting data from sensor, processing completion (e.g. if LEA is used), any interrupts related to transmission.

    My question is, in a heavily interrupt driven system, is there anything concerning about the interrupts when power fails ? is there anything related to interrupts that need to be backed up / restored ?

    (5) after reading the manual for CTPL /fram-utils i think the answer to this is no - we have to handle external peripherals on our own.

  • 0 in reply to Rosh Mendis
    Guru 26200 points
    Hi Rosh,

    regarding 2) & 3):
    - in some cases reading of particular flags changes other flags
    - stopping clock used by module during its operations results in unpredictable states.
    The above things have to be checked for each MSP device or MSP family.

    <<< until complete complete power failure
    Complete power loss means restart when power is back again.
    CTPL is to help to switch to lower power mode and restore configuration when more power is available again.

    <<< Shouldn't the backup procedure work regardless of program flow ?
    <<< is there anything concerning about the interrupts when power fails ?
    CTPL is to help.
    It does what it does and nothing more.
    It is not a silver bullet!

    re 5) s/w cannot handle unknown devices, however you can adapt CTPL to your needs.

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