CCS/MSP430FR2100: Internal RTC during LPM3.5

#define MODCOUNT (32-1)*20

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;

    // Configure GPIO
    P1OUT = 0x00;
    P1DIR = ~BIT3;

    P2OUT = 0x00;
    P2DIR = 0xFF;

    SYSCFG0 = FRWPPW;            // Enable FRAM write access
    SYSCFG2 |= RTCCKSEL;
    PM5CTL0 &= ~LOCKLPM5;

    if (SYSRSTIV == SYSRSTIV_LPM5WU)        // When woken up from LPM3.5, reinit
      {
          __enable_interrupt();
          __no_operation();
          __no_operation();
      }
     else
      {P2OUT ^= BIT1;

      P1REN = BIT3;
      P1IES = 0x00;
      P1IE  = BIT3;
      P1IFG = 0x00;}

    __bis_SR_register(LPM3_bits | GIE);     // Enter LPM3, enable interrupt
}

#pragma vector=RTC_VECTOR
__interrupt void RTC_ISR(void)
{
    switch(__even_in_range(RTCIV,RTCIV__RTCIFG))
    {
        case  RTCIV__NONE:   break;          // No interrupt
        case  RTCIV__RTCIFG:                 // RTC Overflow

            P2OUT ^= BIT1;
          RTCCTL = RTCSS_1 | RTCSR | RTCPS__1024;
            //RTCCTL = RTCSS__XT1CLK | RTCSR | RTCPS__1024; //Stop RTC
            P1REN = BIT3;                    // P1.3 pull-down register enable
            P1IES = 0x00;                    // P1.3 Low/High edge
            P1IE  = BIT3;                    // P1.3 interrupt enabled
             __bis_SR_register_on_exit(LPM3_bits | GIE);

               break;
        default: break;
    }
}

#pragma vector=PORT1_VECTOR
__interrupt void Port_1(void)
{
    P2OUT ^= BIT1;
    P1IE  = 0x00;
    P1IFG = 0x00;                            //Clear P1.3 IFG

    RTCMOD = MODCOUNT;

    RTCCTL = RTCSS_1 | RTCSR | RTCPS__1024 | RTCIE;

    PMMCTL0_H = PMMPW_H;                // Open PMM Registers for write
    PMMCTL0_L |= PMMREGOFF;             // and set PMMREGOFF
     __bis_SR_register_on_exit(LPM3_bits | GIE);

}