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CCS/MSP430I2041: MSP430i2041

Subhronil Chaudhuri
Intellectual 560 points
Part Number: MSP430I2041

Tool/software: Code Composer Studio

Dear all,

It might come off as a stupid question, but I would really appreciate if you could help me out, it is pertaining to the ADC interrupt. So, the MSP430i2041 has SD24 ADCs, which does 'single channel single conversion', 'single channel continuous conversion', and the same with multiple channels. Now using interrupts, the CPU is left unengaged and free to perform other operation while the data acquisition is being performed by ADC? If yes, then how many clock cycles (or how much time) do I have to perform CPU operation on previously acquired ADC data before the new one arrives (at fm = 1MHz, and Oversampling ratio of 256)? 

If there's a text explaining all of this and some more, I would really appreciate being pointed towards it.

Thank you.

P.s., I have a real hard time understanding the concept of interrupts, would appreciate some help in this regard too. 

With Warm Regards

Neal

  • 0
    Guru 95385 points
    The OSR is effectively a divisor on the ADC clock rate (1.024MHz), so with OSR=256 a single conversion takes 256/1.024MHz=250 usec (4kHz output rate). Your program can use that 250usec to process the (previous) data.

    I encourage you to look through the TI Example set (SLAC676F.zip) available under the "Tools and Software" tab on the Product page. You might want to start with example "msp430i20xx_sd24_03" which illustrates single-channel continuous operation with an interrupt.

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