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MSP430FR4131: errata cs13 workaround

Part Number: MSP430FR4131

In order to mitigate cs13 with workaround 4, is it enough to set the DCO  to 2 MHz or does it actually have to run at 2 MHz? Assuming, we are running at 16 MHz (DCORSEL = 101b), the following code

bis     #LPM3_bits, 0(SP)
bis     #SCG0, SR
bic     #DCORSEL_4, &CSCTL1
reti

will configure the DCO to 2 MHz but may actually run faster (depending on the DCO bits in CSCTL0). Would it be better to clear with DCORSEL_5 so we configure 1 MHz (which will sure be less than 2 MHz)?

And is it needed to wait some time before the reti?

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