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MSP430F1611: i2c

Part Number: MSP430F1611


Hello ,

 I am trying a simple master transmit code as below. I am not able to see the clock signals on the Logic Analyzer. Could someone please tell me what is wrong with the code?


#include "io430.h"

unsigned char TxData = 0x5A;
int main( void )
{
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;

// P6.0 output, check power up of board and smlck on P5.5
P6DIR |= 0x01;
P6OUT |= 0x00;
P5DIR |= BIT5;
P5SEL |= BIT5;

//port setup, port3 sda-pin1 and scl-pin3
P3SEL |= 0x0A;

//mandatory initialization
U0CTL |= I2C + SYNC;
U0CTL &= ~I2CEN;

//master cnfiguration

I2CNDAT = 0x01;
I2CSA = 0x0048;

//clock settings
I2CTCTL |= I2CSSEL_2;
I2CPSC = 0x03; // 
I2CSCLH = 0x03;
I2CSCLL = 0x03;

//interrupt settings
I2CIE |= TXRDYIE;


U0CTL |= I2CEN;

U0CTL |= MST;
I2CTCTL |= I2CSTT + I2CSTP + I2CTRX;
__enable_interrupt();
}

#pragma vector=USART0TX_VECTOR
__interrupt void I2C_ISR(void)
{
switch(I2CIV)
{
case 0: break; // No interrupt
case 2: break; // Arbitration lost
case 4: break; // No Acknowledge
case 6: break; // Own Address
case 8: break; // Register Access Ready
case 10: break; // Receive Ready
case 12:
I2CDRB = TxData; // TX data
break; // Transmit Ready
case 14: break; // General Call
case 16: break; // Start Condition
}
}

  • Hello Divya,

    I took a look at your code and it appears to be correct.

    Do you have pull up resistors on the SDA and SCL pins?

    Can you set a breakpoint on line (I2CDRB=TxDATA) in the ISR to see if the TX interrupt is being generated?

  • Hi Dennis,

    I have set a breakpoint as you have mentioned, and have observed that the TX Interrupt is generated.

    With respect to the pull up resistors, I would post the following screenshot:

    Should an external pull up resistor still be connected for the proper working of the code, since the SDA and SCL lines already have a resistor in between the lines and the 3.3V supply?

    Regards

    Divya Sheshadrikumar

  • 100K is rather weak. The usual recommendation is 1k-5k, though I've gotten away with 10k. That said, the symptom would be a slow SCL rising edge, rather than no (falling) SCL edge at all.

    The schematic shows a solder jumper on the SCL wire which appears to be open (both ways). How is this configured on your board?

  • Bruce McKenney47378 said:
    The schematic shows a solder jumper on the SCL wire which appears to be open (both ways). How is this configured on your board?

    From the schematic I think the board is an Olimex MSP430-P1611.

    I think the solder jumper needs to be the SCL_1XX position to connect SCL on the UEXT connector to P3.3/UCLK0/SCL on the MSP430F1611.

    [The same PCB is used for MSP430F1xxx and MSP430F2xxx series devices which have SCL on different pins].

  • Hello Bruce,

    Adding an external 1k pull up resistor resolves the problem. Thank you.

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