Part Number: MSP432P4111
We are porting code from the MSP430 to the MSP432P4111, and the waveform I'm getting from the MPS432 doesn't look correct. The data signal (shown in the red trace) is connected to pin 78 (GPIO port P6.4), while the clock signal (shown in the yellow trace) is connected to pin 79 (GPIO port P6.5). The two I2C lines are connected to an LCD display driver, and the MSP430-based design shows characters on the LCD display, while the MSP432-based design does not. As shown below, the clock trace looks good, but the data trace seems to return to the high state, and is sometimes at a level between gnd and Vcc.
MSP432 waveform displaying bad data line
By contrast the MSP430 waveform seems healthy:
Note that the two transfers shown are different data (obviously), but you can see the difference. On the MSP430 both signals remain in a high logic state until a transfer occurs, and the data signal is high or low, no "in-between" states like what is seen on the MSP432. We are using DMA for the transfer, but I'll only present the code related to the I2C functionality for simplicity.
I2C initialization and send sequence:
#define LCD_I2C_DATA BIT4 //LCD I2C Data
#define LCD_I2C_CLK BIT5 //LCD I2C CLK
#define I2C_BASE_ADDR EUSCI_B1_BASE
//pins 78, 79 - P6.4,5 - I2C
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P6, LCD_I2C_DATA | LCD_I2C_CLK, GPIO_PRIMARY_MODULE_FUNCTION);
i2cConfig.selectClockSource= EUSCI_B_I2C_CLOCKSOURCE_SMCLK; //SMCLK source
i2cConfig.i2cClk= CS_getSMCLK();
i2cConfig.dataRate= EUSCI_B_I2C_SET_DATA_RATE_400KBPS;
i2cConfig.byteCounterThreshold= 0;
i2cConfig.autoSTOPGeneration= EUSCI_B_I2C_NO_AUTO_STOP;
I2C_initMaster(I2C_BASE_ADDR, &i2cConfig);
I2C_setSlaveAddress(I2C_BASE_ADDR, IIC_SLAVE_ADRS);
I2C_setMode(I2C_BASE_ADDR, EUSCI_B_I2C_TRANSMIT_MODE);
I2C_enableModule(I2C_BASE_ADDR);
I2C_enableInterrupt(I2C_BASE_ADDR, EUSCI_B_I2C_NAK_INTERRUPT);
SET_LCD_PWR_HI();
I2C_masterSendMultiByteStart(I2C_BASE_ADDR, *PTxData++);
I2C_masterSendStart(I2C_BASE_ADDR);
Any ideas? Thx.
