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Tool/software: Code Composer Studio
Hello everyone,
I get a problem on SPI clock.
I want to set the SPI on UCCKPL low and UCCKPH high, and this is my code:
void Set_UCB1_SPI(void)
{
P4SEL0 |= BIT5 + BIT6 + BIT7 + BIT4; // Set SPI peripheral bits
UCB1CTLW0 |= UCSWRST; // Enable SW reset
UCB1CTLW0 |= UCMSB + UCSYNC + UCMST + UCSTEM + UCCKPH +UCMODE_2;
UCB1CTLW0 |= UCSSEL__SMCLK; // SMCLK
UCB1BR0 = 0; // 1 MHz
UCB1BR1 = 0;
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCRXIE;
}
But in my logical analyzer, the result is wrong. Here is my setting in logical analyzer:
If I change my code of SPI initial like this:
void Set_UCB1_SPI(void)
{
P4SEL0 |= BIT5 + BIT6 + BIT7 + BIT4; // Set SPI peripheral bits
UCB1CTLW0 |= UCSWRST; // Enable SW reset
//UCB1CTLW0 |= UCMSB + UCSYNC + UCMST + UCSTEM + UCCKPH + UCMODE_2;
UCB1CTLW0 |= UCMSB + UCSYNC + UCMST + UCSTEM + UCMODE_2;
UCB1CTLW0 |= UCSSEL__SMCLK; // SMCLK
UCB1BR0 = 0; // 1 MHz
UCB1BR1 = 0;
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCRXIE;
}
The result will be right. But in this situation, the SPI clock should not be CPOL_low and CPHA_high.
Could anyone tell me what mistake I made or some part I ignored?
Hi,
The difference is that:
You comment //UCB1CTLW0 |= UCMSB + UCSYNC + UCMST + UCSTEM + UCCKPH + UCMODE_2; in second code?
I mostly cares about is whether FR2355 is used as slave?
Can you post a screenshot of wrong code wave and right code wave?
Eason
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