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MSP430F5529: USCI - UART - TXIFG Behavior

Part Number: MSP430F5529

MSP'ers,

Maybe I'm just crazy (ok, I'm definitely crazy...), but I think I found some undocumented behavior that has driven me up the wall today.

On the USCI in UART mode from reading the TRM I'm led to believe that TXIFG is set and remains set as long as there is space in the buffer to transmit.  This however doesn't appear to be the case.  If I get a TX interrupt and say choose to NOT put data in the TXBUF (because I just checked a transmit buffer in my application and I don't have more data to send) then the TXIFG doesn't set itself back to 1 unless manually set by the user.

Did I miss this somewhere in the TRM?  Is it missing from the TRM?  If nothing else this really needs to be documented.

Trey

  • That''s the way it works. To my mind the wording in the User Guide (SLAU208Q) Sec 36.3.15.1 is ambiguous since "set" could be an event or a state. Anyway, observed behavior is:

    1) The USCI sets TXIFG when it moves a byte from the holding register to the shift register. This is an Event.

    2) If you clear TXIFG without loading TXBUF, Event (1) won't happen again so TXIFG won't be set again.

    Personally, I avoid using the USCI IV register in UART mode for just this reason. (The IVs for the other devices are fine.) I can use TXIFG as a state variable as long as I only clear it by writing TXBUF. (If I have nothing to write I clear TXIE.)

  • Bruce, 

    What you've said makes sense.  I am in fact writing TXIE when my application buffer empties, I just expected TXIFG to go back to 1 after the ISR.

    I actually used to work on the customer experience team at TI so I'm passionate about good documentation.  Any TI'ers want to better document this behavior in the TRM???

    Trey

  • Hi Trey & Bruce,

    Thanks for pointing that out. I will pass this feedback to the team.

    Srinivas

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