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MSP430FR2355: Doubt in changing WDT_A module configuration from 32 milliseconds to another time

vamshi b
Intellectual 810 points
Part Number: MSP-EXP430FR2355
Other Parts Discussed in Thread: MSP430FR2355

Hello Team,

I have a doubt regarding watchdog timer configuration which is given in (slau445i) user guide as " After a PUC, the WDT_A module is automatically configured in the watchdog mode with an initial approximately 32-ms reset interval using the SMCLK."

1) Can we change that initial 32-ms time to other time ?

2) another, Is there any way to clear the RAM periodically for MSP430FR2355 MCU ?

  • 0
    Guru 95150 points

    1) You can't change the reset logic, but you can change WDTCTL to something else fairly early in your program. If main is too late, you can write a _system_pre_init() function to do it [Ref C Compiler UG (SLAU132S) Sec 6.9.1.

    2) Which part of RAM do you want to clear? A simple way is to call memset() from a timer ISR. 

  • 0 in reply to Bruce McKenney
    Intellectual 810 points

    Thank you for the reply Bruce,

    1) But in ref guide(slau445i) given WDTIS and WDSSEL as below, can you please describe what does it mean ?

  • 0 in reply to vamshi b
    TI__Mastermind 49692 points

    Hello,

    vamshi b said:
    1) But in ref guide(slau445i) given WDTIS and WDSSEL as below, can you please describe what does it mean ?

    You can learn more about these register settings by reading through Section 12.2 WDT_A Operation in the user's guide.

    Regards,

    James

  • 0 in reply to James Evans
    Guru 95150 points

    Also, legacy.h has some handy definitions for common cases, e.g. "WDTCTL=WDT_ARST_1000;" provides a 1000ms (1 sec) Reset cycle using ACLK (presumed 32kHz). Reading the definitions also gives some clues about how to make your own.

  • 0 in reply to James Evans
    Intellectual 810 points

    Thank you for the reply James,

    I will check it.

  • 0 in reply to Bruce McKenney
    Intellectual 810 points

    Thank you for the reply Bruce,

    I have checked legacy.h given  "WDT_MDLY_32'' next directly to " WDT_MDLY_8" that too at assumed 1Mhz. no definition for 10ms.

    also in earlier as you mentioned "can't change reset logic". I don't want to change reset logic, but can time changeable? if yes, i want it to set for 10ms. How to set it to 10 ms ?is there any possibility for 10ms?

  • 0 in reply to vamshi b
    TI__Mastermind 49692 points

    The "reset logic" is related to the default WDT interval at start-up based on the default WDTIS setting. Table 12-2 in the user's guide shows that the default value after a reset is 04h. The Description column shows that 04h means ~1 second. As Bruce mentioned earlier, you can change that period to something longer (e.g. 18:12:16) at the very beginning of your code. If it's done before the WDT resets, it won't reset until after the newly set interval.

    Regards,

    James 

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