• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 29 subscribers
  • Views 55 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8906-Q1: Application issues of chips

Tonyx.wu
Expert 2415 points
Part Number: DRV8906-Q1

How much margin does overcurrent protection need to be left after multi-channel parallel connection? How is the consistency of current in each channel after parallel connection? Do you have any relevant documents or data explanations

  • 0
    TI__Expert 8400 points

    Hello,

    The deglitch time, tOCP, is to be less than 10-us during parallel mode operation. 

    The current is slit evenly between each channel, due to the same RDSon of the half-bridges. 

    See section 8.3.1.1.3 for more on parallel modes during continuous operation.

    To avoid any chance of triggering an OCP event during any possible channel-to-channel delay, map the parallel channels to the same PWM channel. 

    See section 8.3.1.1.4 Parallel Mode (PWM Operation) for more on single PWM channel mapping details.

    Best,

    David