DRV8462: EN_OUT bit reset after setting it on by spi

Hey Gualtiero,

Is the ENABLE pin set to HIGH before you toggle the EN_OUT bit to 1?  

Are you using an EVM or your own board?  If it's an EVM, please do File, Program Device in the latest GUI to update the firmware to make sure there isn't a firmware-GUI version mismatch. 

Best,

Jacob

No , I am using  my custom board. Enable and nSleep are tied to +5v that is the same uC supply. I have  made additional test and beside the reset of EN_OUT i see that  the registers I wrote  and read correctly  after  some ms  return the default value.  My Question now is : is there any event ,apart  than Enable or nSleep pins going low, that may cause the  reset to the defaults register values ? Thanks.

Hmm,

Can you try sending the nSLEEP Reset Pulse before turning the output on, or at least on startup?

The fault events are listed in this table below.  See the two events that cause a logic reset are VM Undervoltage and Logic Power Supply POR.  Do you have bulk capacitance in your system?  I recommend getting a scope capture of VM when you try to start the motor to see if VM dips below V_UVLO causing device reset.  Make sure you also have the recommended external components in table Table 7-1, at least the C_VCP, C_SW capacitors and VM filtering capacitors (though all are recommended, those are just the often forgotten ones)

Best,

Jacob

Hi Jacob, I appreciate your effort to help. Anyhow I can't getb ride of it, noneless my  very long experience. All the capacitors are in place. The Vcc and VM voltage are not affected looking with the scope syncronised on  the EN_OUT from the SPI. Everything is working if I I disconnect the motor: EN_OUT stays high at each step and the indiex register of the stepper  change as expected,, reading  the other registers return the programmed value. If I plug the motor it seems to reset after  EN_OUT is written high without any voltage drop as I alredy said.  It is by sure a reset of the digital core : I see  DOUT going to zero while reading the registers. Another incredible thing is that even if enabling the bit VREF_INT_EN  , when I touch the VREF pin the current PWM duty enlarges a lot and I can hear the power on the coils ( I set EN_OUT high every cycle  after it resets). I also red another guy telling about this issue.

Hi , I have to correct  my last assertion about VREF. Since the registers reset ,that flag surely goes to default that is external VREF enabled. My next attempt will be to use another board and see if I get the same problems.

Hey Gualtiero,

Does the FAULT register (0x00) show any faults with the motor connected?  Or DIAG1 or DIAG2 registers?  

Are you using Stall detection, or do you have EN_STALL=1?  The device will disable outputs if it detects a stall.  Also make sure Open Load Detection is disabled

Best,

Jacob