DRV8353: Missing Gate Drive PWM Signals

Hey Himavanth,

Thanks for the question. Could you elaborate a bit more on what you mean by primary side PWM and secondary side PWM?

Are you referring to INX signals (primary) and GHx-SHx/GLx-SLx(secondary)?

If you have any labeled waveforms with the issue it would help us understand the topic better.

Best,
Akshay

If you're driving with IDRIVE at its maximum value, I've found the chip is prone to breaking via a short between GLx and GND. It should normally be 140 k ohms. Is nFault going low? A broken gate output would cause a gate drive fault which would latch nFault low until you give it a reset pulse.

Hi Akshay Rajeev Menon,

Thank you very much for your reply. 

Are you referring to INX signals (primary) and GHx-SHx/GLx-SLx(secondary)?

Yes,  INHA, INLA, INHB, INLB, INHC and INLC signals as primary signals and GHA, GLA, GHB, GLB, GHC and GLC signals as a secondary signals. 

I can see all primary signals are operating at 16KHz, and secondary side PWM signals are missing out. I will attach a screenshot of the signals in the next reply. 

Thanks & Regards

- Himavanth Reddy G

Hi Kelvin,

I haven't seen any faults from the gate driver side. 

"If you're driving with IDRIVE at its maximum value, I've found the chip is prone to breaking via a short between GLx and GND." If the chip is prone to breaking with the IDRIVE at maximum and nFault is low, do you have any suggestions for a workaround to avoid this issue? How do you choose the configuration of IDRIVE capability(i.e what all parameters do you account to configure IDRIVE)?

Thanks & Regards

- Himavanth Reddy G

Hey Himavanth,

Yes, Please attach waveforms. Please also capture nfault.
 Useful links:

https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1176539/faq-quick-guide-to-debugging-common-issues-in-bldc-motor-drivers

https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/796378/faq-selecting-the-best-idrive-setting-and-why-this-is-essential

Best,

Akshay

Hi Akshay,

Please find the oscilloscope screenshot attached below for your reference. 

CH1(Yellow) = INHx

CH2(purple) = GHx

CH3(Blue) = FAULT 

We have set the falling edge trigger at 2.5V for Fault pin and haven't observed any faults during the operation.  

Note:  

we have changed Idrive setting to 300/600 mA(i.e. R31(DNP) and R35(>500K)). 

These are the FET(Qgd = 17nC, Trise = 8nS, Qg = 118nC), we considered 100nC for Trise as mentioned in FAQ. 

Idrive = 17nC/100nS = 170mA.  

Any help on this is greatly appreciated:)

Thanks & Regards,

- Himavanth Reddy 

Hey Himavanth,

Thank you for the response, I will aim to review them and provide an update.

Best,

Akshay

Hi Akshay,

As discussed in previous reply, we have changed the Idrive setting to 150mA(i.e Connect IDRIVE pin to ground with 75K).

Please find the screenshot attached below. (GHx wrt GND(Yellow), SHx wrt GND(Purple) and GHx wrt SHx(White)).

Any Help on this is greatly appreciated:)

Thanks & Regards,

- Himavanth Reddy G

Hi Himavanth,

Are you PWMming your low side MOSFET as well? could you show the low side GLx voltage? Additionally, could you provide the motor current measurement? It looks like the high side MOSFET is turning on as expected, but am trying to understand what is happening when the high side gate is commanded off. 

Regards,

Anthony Lodi

Hi Anthony Lodi,

Yes, I have tried probing GLx and Spx signals on all three phases. I can see both the signals are at 0V for all 3 phases that means low side FET is not turned ON. 

I have probed INLx signals I can see PWM signals with expected frequency. 

Any further help on this greatly appreciated:)

Thanks & Regards,

- Himavanth Reddy G

Hi Himavanth,

Could you provide a schematic? Could you probe at the GLx pin vs at the MOSFET gate to see if there is a difference? Could you provide a waveform showing INHx and INLx signals along with GLx?

Regards,

Anthony Lodi

Hi Anthony Lodi,

Please find the schematic screenshot and oscilloscope screenshots attached below. 

We have resoldered the DRV8353RH driver IC, to eliminate the issues with cold solder joints. 

Now I can see some pulses on the GLx lines. 

Note: INLx(Blue), GLx(Purple) and SPx(Yellow). I can see FET is turning ON twice during the ON cycle of PWM. I couldn't understand why gate signals of the LOW side FETS are turning ON and OFF, when PWM input is kept constant.

Thanks & Regards,

- Himavanth Reddy G

Hi Himavanth,

Thanks for the additional waveforms! Im glad you were able to resolder and get a better connection on the low side gates. I suspect the reason why you are getting 2 pulses on the low side gate could be a result of noise possibly coupling into the INHx signal during switching, causing the shoot through protection to activate since it looks like there is quite a lot of noise on the input signal. Could you add in the INHx signal during the measurement to confirm what is seen on that signal? Is nFAULT going low at any point?

Regards,

Anthony Lodi

Hi Anthony Lodi,

nFAULT is not going LOW during testing process. 

These are the screenshots of the INHx wrt GND and INLx wrt GND. 

Thanks & Regards,

- Himavanth Reddy Gorla 

Hi Anthony Lodi,

I really appreciate your quick response. I will try to solve it from timer software configuration side.

How can I choose the dead time? can you please point me to right resource to understand it more clearly?

Thanks & Regards,

- Himavanth  Reddy G

Thank you very much for your support:) 

Your welcome!

Regards,
Anthony