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DRV3201-Q1 Question(PH1-PH3 behavior)

Other Parts Discussed in Thread: DRV3201-Q1

Hi,

I would like to ask you following questions about DRV3201-Q1.

Q1) The output condition of PH1-PH3

How is the output conditions of PH1~PH3 when RSTN is low? (reset)

All outputs are low?

Q2) The influence of EN, B_EN, DRVOFF input signal

Is there possibility to change of these output signals (PH1~PH3) by the input signal conditions of EN/B_EN/DRVOFF?

In other words, the outputs of PH1~PH3 are stable regardless of the conditions of EN/B_EN/DRVOFF pins, correct?

 

Thank you for your support!

Best Regards,