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DRV10866: How to reduce jitter

Part Number: DRV10866

Hi Team,

My customer has the DRV10866 running in an early prototype but they are finding that they need to reduce the jitter.

While currently spinning at 1800 RPM (30Hz) and the once around jitter is about 18us peak-to-peak based on an optical measurement. This is strongly driven from the random jitter on the bemf signal Fg of about 40us peak-to-peak. Can you tell me how the Fg signal is generated? Is the analog bemf signal synchronized to an internal clock frequency or is Fg the digital representation of the purely analog bemf?

Have any users of this device employed RC filters on the winding voltage and neutral point to reduce jitter? If we can’t dramatically reduce the jitter then we will need to find an alternate device.

Any feedback you can provide would be helpful.