This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Looking at the DRV8332 datasheet the VDD Pin system design requirements talks about both VDD and GVDD. Is there any discussion about requirements of capacitance on GVDD and PVDD?
I see examples in the application circuits but there is no discussion about any actual requirements, best practices, etc?
Bryce,
Thanks for posting in the MD forum!
I would recommend following the application circuits or the EVM guidance. If you wish to deviate from these instructions please let us know and we can discuss the potential effects.
Regards,
-Adam
Thanks Adam, yeah I suppose I will. Would be nice to know any design minimums! My particular application tends to require use of Ceramic and maybe Tantalum capacitors. Electrolytic are a no go! uF is a premium!