DRV8353: Some problems in drv8353 motor drive applications

Hello Annie,

Thank you for your questions.

1. VM has been connected to the 5V power supply generated by external step-down, but the gate drive voltage is still equal to the bus voltage? This problem also occurs on the evaluation board of drv8353rs-evm. The customer did not change any configuration of the evaluation board. R19 resistance is welded, but the gate drive voltage is still equal to the bus voltage

• Can you confirm that VM is connected to only "5V"? the operating range of VM is 9V minimum. Do you mean "15V"?

2. Whether the delay from 8353 input to output of the PWM used for control has measured data?

• The total delay from INHx or INLx to the edge of SHx will depend on several factors: tPD, MOSFET Qg, IDRIVE, tDEAD, and the direction of the motor current into or out of SHx. We measure tPD as the time it takes from INHx or INLx edge to the start of a change on the GHx or GLx output.

3. Does the gate drive between output of drv8353 and the MOS gate do not require any other auxiliary circuits such as gate resistors? 

• The circuit does not require any resistors or diodes for function. However if the MOSFETs chosen have a very small Qgd, you need to implement series resistors to further reduce the gate drive from the minimum setting of 50mA source in order to target a 100-500ns rise time.
• For example if your MOSFET has a Qgd of 10 nC, the lowest IDRIVE setting of 50mA results in a rise time of 200ns, which is OK.
• For example if your MOSFET has a Qgd of 4 nC, the lowest IDRIVE setting of 50mA results in a rise time of only 60ns. You should add R = 200 ohms in series to increase the rise time to 115ns.

4. Can the internal integrated op amp of drv8353 not be connected to the input? If it is not connected, can it be suspended, can it be suspended by using only two of the channels? If it can not be suspended, how to deal with it? Are the control cores in the op amp and drv8353 independent of each other? Will the control core not work if the op amp does not work? Does the op amp support differential input?

• You can tie off any or all of the current sense amplifier channels. To do this, tie SPx and SNx together and then route SPx/SNx to the source of the low-side MOSFET.
• You do not need to have sense resistors in your system for the DRV8353 gate driver to work. The device will properly operate when 0, 1, or 2 sense resistors are used in the system (make sure to tie off SPx & SNx as described above)
• SPx is used as the negative voltage input for the VDS monitor (overcurrent protection). You should not leave SPx or SNx floating.
• The current sense amplifiers and digital core of the DRV8353 are not completely independent, a fault in the current sense amplifier will result in a fault condition shutdown (for example, VSENSE overcurrent). If you properly tie off the CSA inputs as mentioned, there will be no issue for normal operation.
• The current sense amplifiers are designed to support a differential voltage range of only +/- 0.3V (Datasheet page 14, "Differential mode input range")

Thanks,

Matt