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TPS68470: Power-up and down sequence

Hironori Yoshimura
Intellectual 1830 points
Part Number: TPS68470

Regarding datasheet page#18 Power-UpSequenceand Modes, Do you have specific rules after V3V_SUS and 3V3_SYS inputs?
any constricted rules I2C pullup supply/ GPIC signals(Example platform reset signal).  I carefully looked datasheet but I thought there are no constricted rules.
Please advice if you have any specific condition power up seq/ as well as stricted timing requirement.
Regarding power down seq, Do you have any contstricted rules as power down seq?
if you have any specific rules, please kindly share more detail information(condition/Timing requirements or so)?

Best Regards,
Hironori Yoshimura

  • 0
    TI__Genius 10380 points

    Hi Hironori Yoshimura,

    It is recommended to apply 3V3_VDD at the same time or after 3V3_SUS (see Figure 3 of the datasheet). Once 3V3_SUS and 3V3_VDD are present, IO_OUT will power up automatically and the device will enter the ACTIVE state. In this state, GPIOs and RESET_IN can be configured as needed by the application. There are no specific timing requirements as long as the correct sequence is followed

    • 3V3_SUS and 3V3_VDD => IO_OUT powers up => configure GPIOs

    For the power down, ensure 3V3_VDD is removed at the same time or before 3V3_SUS. 

    In many applications, IO_OUT supplies the I2C pull-ups. Is there a separate pull-up supply in your application?

    Thanks,

    Gerard