Hello guys,
One of my customers is designing a schematic of their own board for LM5175 evaluation.
They have a few questions as the follows. Could you please give me your reply for them?
Q1. Any gate resister is not used on the schematic of Figure 24 in 9.2 typical application section on page 20 of LM5175 datasheet (Version SNVSA37A).
I think that high current will be sunk or sourced to gate driver of LM5175 at H/L transient timing.
Is it no problem if switching noise level is lower than our criteria? Is the gate resister of external FET not mandatory?
Q2. If the gate resister is mandatory, what is a appropriate gate resistor value? Is it needed to adjust the resistor value with cut and try on the own board?
Best regards,
Kazuya.