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Hi support team,
Please let me know the meaning of "TEST CONDITIONS" of "IVDD, op".
Is the following correct?
fsw :
Frequency of output terminals (OUTL, OUTH)
2Ω :
Resistance value connected in series to OUTL and OHTH terminals
(Including gate resistor with built-in FET)
0.1pF load, 100pF load :
External load capacity of OUTL and OHTH terminals
(Input capacitance of gate terminal of FET for external connection)
Regards,
Dice-K
Dice-K -san,
Thank you for reaching out!
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Yes, you are correct! To clarify, I have quickly drawn what the test circuit looks like (for the 100pF example).
I hope this answers your question! If so, please press the green button; otherwise feel free to follow up!
Thanks,
Aaron Grgurich