LM60430 datasheet P19 is described that "a minimum of 10µF of ceramic capacitance is required", but the other EVM and reference schematic are used 4.7μF (and 220nF×2).
Please let me know about the background for Cin has established more than 10μF.
I think that 4.7μF is OK if matched input and ripple condition.
Best regards,
Satoshi
Hi Satoshi,
We recommend a minimum ceramic capacitor of 10uF as the ceramic input capacitors provide a low impedance source to the regulator in addition to supplying the ripple current and isolating switching noise from other circuits.
The typical application in the datasheet is just a simple schematic showing the principles, as we regard that you already have some capacitors in the front stage. You can refer to our EVM for the specific design. As you can see, in our EVM, we have not only CN1, CHF1, CHF2, but also CF1 and CF2 in the front end. So we will recommend you refer to our EVM design and also datasheet input capacitor selection guidelines.
Generally speaking, the input capacitance will influence the input ripple, you can refer to this app note https://www.ti.com/lit/an/slta055/slta055.pdf?ts=1625565434937&ref_url=https%253A%252F%252Fwww.google.com%252F to calculate the capacitance in the worst case of your applications.
Regards,
Xiaoying
