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BQ76940EVM Cell Balancing

Part Number: BQ76940EVM
Other Parts Discussed in Thread: BQ76940

I have noticed that the cell balancing signal to the PFET is fluctuating during cell balancing testing.

May I know is this normal? Is there any way to let the cell balancing signal stay ON all the time for the balancing period?

  • Hi Brandon, 

    During cell balancing the VCn and VCn-1 pins pull together to provide a small balance current and trigger the external transistor if used.  This pull is duty cycled to allow balance and measurement, an example is shown in figure 5 of the application note which includes some description of the timing if you are interested.  The duty cycling is built into the hardware of the device and can not be left on constantly during balancing.  There is not a document which describes a recommended balancing algorithm, that is left to the designer's choice. Notice with the timing description however that since the host is asynchronous to the BQ76940 timing, the internal communication between cell groups, and the fixed timeline of the groups which must adjust for balancing, it will be more effective to turn on balancing for some time, seconds perhaps, rather than trying to duty balancing quickly with the  host.  If the host has balancing on less than 250 ms there may be no balancing observed depending on the alignment with the internal scheduler.