TPS51206: Start up and shut down sequence

Takashi Onawa

Part Number: TPS51206

Hi Team,

According to the datasheet, Figure 23, VDD => VLDOIN,VDDQSNS for power up and VLDOIN,VDDQSNS => VDD for shut down sequence are recommended.

Could you tell me the risk under following sequences? Do you think device might get any damages?

(1)VLDOIN,VDDQSNS => VDD(Reverse order of recommendation)
(2)VDD,VLDOIN,VDDQSNS at same time power up and down

In unexpected condition, like upper supply power supply delay and power outage of the system, they sometimes may not be able to follow this sequence.
So They need to be aware of the risks in such cases.

Regards,

Takashi Onawa

over 2 years ago

0 Kadeem Samuel over 2 years ago

TI__Genius 12450 points

Let me take some measurements on the bench and see if I run into any issues.

Thanks,

Kadeem

+1 Kadeem Samuel over 2 years ago in reply to Kadeem Samuel

TI__Genius 12450 points

On the TPS51206EVM, I see the following:

1. No issue, although I should note that instead of taking around 3ms for VTT to rise, it is substantially faster, at around 40us. This does manifest as a load transient on VDDQ. With a VDDQ of 1.2V (VTT = 0.6V), the undershoot is 100mV, and the overshoot is 40mV.

2. Same as 1

So long as the DIMM can support the faster rise time, and the source suppling VDDQ can handle the transient, it should be no issue.

Thanks,

Kadeem

0 Takashi Onawa over 2 years ago in reply to Kadeem Samuel

TI__Genius 13200 points

Hi Kadeem-san,

Thanks, I understood that device should not get the damage by such the sequence change and estimated risk will be like overshoot and understood due to fast SR.

Regards,

Takashi Onawa

Power management

Power management forum

TPS51206: Start up and shut down sequence