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TPS61023: and TPS610994 board layout check

Part Number: TPS61023
Other Parts Discussed in Thread: TPS22919, TPS61099, TPS61094

Hello, I upgraded low energy board layout with TPS61023 and TPS610994 converters. Could you check please? Screenshots:

2 first screens are converters area, 3rd is converter and load switch schematic. 4 and 5 has GND highlighted. I got few questions:

1) Layout for TPS61023, TPS610994 (R15 and R16 will be used while it is TPS61099) and TPS22919 need any upgrades/changes (3V battery input at CN1)?

2) At pcb will be MCU (U4), radio module (U6), scale module (U5), one external i2c device on CN5 and 2 external analog devices on CN2 and CN3. Do I need do changes with grounding of my devices? GND will be whole bottom layer excluding tracks. (will it work stable with that GND, or need changes)

3) Should I make hardware changes with MCU GPIOs to reach as low as possible power consumption on GPIOs while not used (if yes, what chanes?), or it is just about software? (it will be mostly in sleep mode with very low power consumption but I am afraid of leaks at GPIOs)

Looking forward to hearing from you!

  • Hi Marcin,

    Thank you for reaching out on E2E.

    I'll forward your questions to application engineer to review the layout. He should give you the feedback early next week. 

  • Hi Marcin,

    Sorry for delay. I just come back from holiday today. I will reply you the feedbacks by mid of this week. Thank you very much for your patience!

    -Wenhao

  • Hi Marcin,

    For TPS22919, I am not expert for load switch expert. You could create another thread individually for TPS22919. Could you please see my comments to your schematic and your questions? Anymore questions please let me know.

    Schematic:

    TPS61023: I did not see any problems;

    TPS610994: Please connect FB to GND. This is a fixed Vout version;

    PCB:

    TPS61023:

    1.The trace from load switch to inductor and Vin is too thin. It should be thicker;

    2.It is recommended to place another trace to make R2 connected to GND. The R2->GND trace and C3->GND trace is not recommended to overlap as C3->GND contains switching current and could inject noise to control loop via R2->GND; Right one is an example

    3.I would recommend you place 2nd layer a whole GND layer. Or at least place intact GND polygon below TPS61023 and TPS610994 area. This would not only help dissipate heat, but also reduce unwanted parasitic parameters in loop;

    TPS61099:

    1.The trace from load switch to inductor and Vin is too thin. It should be thicker;

    2.Please introduce a Vin polygon as below

    Please see my next post for your questions.

  • Hi Marcin,

    1) Layout for TPS61023, TPS610994 (R15 and R16 will be used while it is TPS61099) and TPS22919 need any upgrades/changes (3V battery input at CN1)?

    [WW]If it is TPS61099, then FB is fine with that configuration. See my last post for my comments of your layout.

    2) At pcb will be MCU (U4), radio module (U6), scale module (U5), one external i2c device on CN5 and 2 external analog devices on CN2 and CN3. Do I need do changes with grounding of my devices? GND will be whole bottom layer excluding tracks. (will it work stable with that GND, or need changes)

    [WW]I would recommend your place at least a whole GND at 2nd layer, to screen switching noise from influencing internal signal traces.

    3) Should I make hardware changes with MCU GPIOs to reach as low as possible power consumption on GPIOs while not used (if yes, what chanes?), or it is just about software? (it will be mostly in sleep mode with very low power consumption but I am afraid of leaks at GPIOs)

    [WW]I do not know your power consumption of MCU. It depends on you and you could give me how much current TPS61099 and TPS61023 will provide. We could check availability based on that. 

    -Wenhao

  • Hello, thank you so much! I made few changes in layout, if you could check.

    Vin traces changed, also C3 and R2 GND traces changed. For TPS61994 FB will be connected to GND by default (I made divider becouse of availability of TPS610994, and it can be replaced with TPS61099)

    I will also make topic with question about TPS22919. :)

  • Thank you for your answers :) All clear, just question to 3rd.

    3) Should I make hardware changes with MCU GPIOs to reach as low as possible power consumption on GPIOs while not used (if yes, what chanes?), or it is just about software? (it will be mostly in sleep mode with very low power consumption but I am afraid of leaks at GPIOs)

    [WW]I do not know your power consumption of MCU. It depends on you and you could give me how much current TPS61099 and TPS61023 will provide. We could check availability based on that. 

    It looks like my MCU on very close looking board is consuming 0.8mA of current at sleep. It should be way less, so I am thinking of current leaks on GPIOs connected to phericals. Acording to datasheet of MCU, it should consume 10uA while deepsleep.

  • Hi Marcin,

    I think both device should be fine to handle your cases. What is your maximum load current requirement for TPS61099 and TPS61023, respectively? Are you power the board by battery?

    It looks like my MCU on very close looking board is consuming 0.8mA of current at sleep. It should be way less, so I am thinking of current leaks on GPIOs connected to phericals. Acording to datasheet of MCU, it should consume 10uA while deepsleep.

     

    For your layout, i think it looks better than previous one. What is your 2nd layer? What is your grounding configuration? It is very important also.

    -Wenhao

  • I think both device should be fine to handle your cases. What is your maximum load current requirement for TPS61099 and TPS61023, respectively? Are you power the board by battery?

    I made board for 100mA and 1A but it will be less, like 30mA and 0.7A respectively. Powered from 2xLR20 battery (3V nominal)

    For your layout, i think it looks better than previous one. What is your 2nd layer? What is your grounding configuration? It is very important also.

    I am newbie with grounding, need some tips. There is my configuration, whole bottom layer is ground excluding traces. Could you take a look and check if I can upgrade? (blue is GND at bottom layer)

  • Hi Marcin,

    Thanks for info.

    So it is 3V->3.3V/30mA with TPS61099, and 3V->5V/0.7A with TPS61023? Could you please confirm? I would rather recommend you TPS61094 as it has higher efficiency at light load than TPS61023, but since you have already chosen the  TPS61023 and done a layout based on it. So be it.

    I am newbie with grounding, need some tips. There is my configuration, whole bottom layer is ground excluding traces. Could you take a look and check if I can upgrade? (blue is GND at bottom layer)

    [WW]I knew the bottom layer is ground. Is there any other layers(signal layer 1/signal layer 2) also grounding layers?

    -Wenhao

  • So it is 3V->3.3V/30mA with TPS61099, and 3V->5V/0.7A with TPS61023? Could you please confirm?

    Yes, it is.

    [WW]I knew the bottom layer is ground. Is there any other layers(signal layer 1/signal layer 2) also grounding layers?

    Just bottom layer is GND (2 layer board)

  • Hi Marcin,

    If there is signal traces on bottom layer below or near VOUT, SW, VIN traces/polygon/vias, i would strongly recommend you place 2nd layer GND just in between top and bottom. The VOUT, SW and Vin is noise source which could disturb your signal trace functionalities. Thanks!

    -Wenhao