LMG1205HBEVM: Unexpected high power consumption with sine wave pwm input

Hi Geert,

Thank you for your question. We need some clarification about the input signal. Could you please provide a scopeshot of the signals both at HI pin and LI pin? 

Also, could you please provide a block diagram and schematic of your system. This will help us understand your requirements and how your output is connected to the FETs. 

Are you driving a half bridge? If so, what is the Vbus voltage?

Regards,

Leslie

As requested some more details on the input signal:

Yellow signal : measured on HI
Green signal: measured on LI

Fig 1 HI and LI measurement

Fig 2: zoomed in on Fig 1: on a certain place:

Fig 3: zoomed on figure 1 to check the dead-time between HI and LI
=> Dead-time looks OK.

Fig 4: modulated signal on connector J2
Duty Cycle starts at 0 % and then evolves to 100 %. After reaching 100 % it is going slowly back to 0 % and so on.

Fig 5: modulated signal on connector 2

Block schematic

We are using a single LMG1205HBEVM module, so it's a half bridge.

Bus voltage is 12V.

Kind Regards,

Geert

Hi Geert, 

Thank you for the details. I'll review the information you provided and get back to you on this tomorrow. 

Best regards,

Leslie

Hi Geert,

Regarding your question about why the HS pin goes to GND during the ~5us time, from the driver point of view, it is seeing LI high and HI low, which turns off the high side FET and turns on the low side FET. Therefore the HS pin is pulled low to GND through the low side FET. This seems a correct behavior from the driver. 

Regarding your question about the high current drawn, from the driver perspective, we can look at other signals to make sure that everything is within spec. Along with the HS-Vss signal, could you provide these other waveforms to make sure everything is operating within specification:

• HB-HS
• HO-HS
• HS-Vss
• VOUT+ to VOUT-

Best regards.

Leslie

Due to bank holiday we will only be able to provide the requested waveforms by Tuesday earliest.

Kind regards,

Geert

Hi Geert, 

Thank you for the update. 

Regards,

Leslie

Here are the additional screenshots:

Yellow signal: HS - Vss
Green signal: HB - Vss

Fig 1: measured signals HS and HB refered to Vss

Measured with a differential probe: Testec TT-SI 91 01
Yellow signal = HB - HS

Fig 2: Measured signal HB-HS

Yellow signal: HS - Vss
Green signal: HO - Vss

Fig 3: measured signals HS and HO refered to Vss

Measured with a differential probe: Testec TT-SI 91 01
Yellow signal = HO - HS

Fig 4: Measured signal HO-HS1

Yellow signal: HS - Vss
Green signal: Vout + - Vout -

Fig 5: measured signals HS and Vout refered to Vss

Kind regards,

Geert

Geert,

Thanks for the waveforms!  Leslie will get back to you tomorrow!

-Aaron Grgurich

Hi Geert, 

Thank you for providing the waveforms. From the driver's perspective, seems like several specs are being exceeded. You might want to zoom into the larger positive and negative transients on the signals to see exactly how much above the specs these signals are going, but from the plots you provided it seems like the HS voltage with respect to Vss is going below the -5V abs max of the device; HB with respect to Vss abs max is 0V and the plots show HB going below VSS; and HO-HS voltage is specified to min VHS-0.3V, but the plots show this negative voltage being beyond the specification. Another thing you can check when zooming into the HS signal, is to make sure that the maximum slew rate allowed for this device is not exceeded (50V/ns). 

You mentioned at the beginning that you first tested with a function generator. Was it the exact same signal pattern that the TMS570 is creating?

Regards,

Leslie

Hi Leslie,

Our waveform may indeed not be clean enough for the amplifier module.
After reading this thread we are beginning to worry that the TMS570 NHET+HTU combination may not be suited to run at 1MHz.

I will open a new question in the microcontroller forum.

Thanks,

Geert