TPS3823: Questions about WDI pins

Wu Steve

Part Number: TPS3823

There is an abnormal behavior on our circuit，and the phenomenon is not easy to reproduce。

Currently we set WDI to high-impedance , we purpose to disable the WDI timer from our system.

I found the problem of adding capacitors in the forum，but I don't understand how WDI judges the correctness of pulse signal

According to the specification

Q1: Which it will generate its own WDI pulse to ensure that RESET does not assert.

Do these signals also conform to the parameters in the table?

At this time, use an oscilloscope to measure whether the WDI signal is correct

Q2: How the chip judges the WDI signal and What parameters need to be met?

Q3: As shown in the schematic diagram, if WDI is not used, Is there any hidden danger in the circuit？

+1 Jake F over 2 years ago

Hi Steve,

From what I can see, the slew rate of your WDI signal is slower than the 100ns/V spec per section 7.3.

The parameters which are required to be met are described in the Timing Requirements section of 7.7, which you already posted.

So long as those specifications are met, the transition detector will detect a transition and issue an ASSERT on RESET.

No, there is no hidden danger in the circuit, as long as the WDI pin is left in a high impedance state.

Do you have any information to share regarding the abnormal behavior of your circuit?

Jake

0 Masoud Beheshti61 over 2 years ago in reply to Jake F

We are closing this thread as we did not hear back from you. Thank you.

0 Wu Steve over 2 years ago in reply to Masoud Beheshti61

We found that without activating the chip, this circuit will still output an occasional reset signal.

Finally, the chip was removed.

After long time of pressure test, the system performed normally.

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