• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 62 subscribers
  • Views 230 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ76942: BQ76942

Zbynek Bures
Prodigy 10 points
Part Number: BQ76942

Hello,

I have problem with predischarge.

I set these regiesters:

FET OPTIONS 0x1D

PREDISCHARGE TIMEOUT 30

PREDISCHARGE STOP DELTA 0

I have programmed two seconds period toggle of output. I have capacitor 470uF with electronic load set to 2A.

I made SW preconfiguration and I'm switching ON and OFF output by command FET_ENABLE. Behaviour of BQ is very strange.

If load is OFF then sometimes it makes predischarge phase, sometimes not, (mostly not).

If load is ON then predischarge never happened.

First picture is schematic of predischarge.

Second picture is working predischarge no load,

Third picture no predischarge with load,

Fourth picture no predischarge with smaller load (blue curve is current probe)

  • 0
    TI__Mastermind 34450 points

    Hello Zbynek,

    I tested the PDSG with my EVM and the pre-discharge function on time-out worked as expected. I tested with load and no-load and it displayed the expected behavior using stop delta of 0 and pre-discharge timeout of 30. Every FET_EN setting would enable the pre-discharge.

    Could you also describe exactly what each picture is showing? What is the labeling for each wave and what do they represent? Is the pre-discharge measurement done between the gate and source of the pre-discharge FET?

    Could you share your .gg configuration? So I may test it on my board.

    Best Regards,

    Luis Hernandez Salomon

  • 0 in reply to Luis H. S.
    Prodigy 10 points

    Hello,

    thanks for your reply.

    I took my EVM  board too and I modified some parameters but it looks that there are some problems.

    I thought predischarge fet is broken so I changed it. On board is predischarge resistor 4k7 quite big only for low current but no problem.

    I made reset of chip means default parameters and I modified only FET options to 0x1d.

    yellow TP32 PDSG

    green TP35 DSG

    blue TP22 PACK

    No LOAD.

    I thought I should see some increasing voltage on TP22 during PDSG on, but no. Now I have on PACK+ still 19V.

    evm_def.gg.csv

  • 0 in reply to Zbynek Bures
    TI__Mastermind 34450 points

    Hello Zbynek,

    I tested your configuration on my board and it worked as intended. I tested using FET_ON and also by disabling the DSG FET using the FET commands and enabling it with ALL_FETS_ON() commands. In all cases, PDSG worked. This was with no load. If you clear FET_ON and use the PDSG test command, do you see the FET activate at all?

    If not, it may be that you are you measuring the wrong connections. The PDSG FET is a PFET that has its source connected to the common-drain point of the normal DSG/CHG FETs. So you have to measure the gate of the PDSG FET to respect of its source, which is the drain of the DSG/CHG Power FETS.

    In the EVM you would want to connect your oscilloscope probe between TP23 and TP27/TP32. The voltage measured should be ~8-V when the PDSG FET is on. 

    Best Regards,

    Luis Hernandez Salomon

  • 0 in reply to Luis H. S.
    Prodigy 10 points

    Hello Luis,

    thank you for your help.

    I finally found where is a problem. My osciloscope probe load outputs for mosfets and hold them sometimes on, and sometimes as it should be.

    Finaly I tested all  features and it looks good.

    Thanks a lot for your advices.

    Sincerely Zbynek