Hello,
I'm trying to determine what the maximum ESR for the output and NR/SS capacitor is for the new TPS7A9401 regulator.
Regards,
Jon
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Hello,
I'm trying to determine what the maximum ESR for the output and NR/SS capacitor is for the new TPS7A9401 regulator.
Regards,
Jon
Hello Jon,
ESR value for the NR/SS capacitor is not as critical as it is for the Output Capacitor. We recommend that X5R or X7R ceramic capacitors be used at both (NR/SS & OUT) these pins. Ceramic capacitors offer very low ESL and ESR values which typically would not exceed 0.2Ω. This device should provide stable performance with these caps. Hope this satisfies your requirements. Thanks!
Regards,
Srikanth
Hello Srikanth,
Thank you for the quick response. I am wondering about the max ESR in the case of using a Tantalum capacitor on the output.
Thanks,
Jon
Hello John,
What is the value of the Tantalum capacitor you wish to use at the Output pin?
Regards,
Srikanth
Hi Srikanth,
I don't have a specific value picked out but likely to get a low ESR value it would probably end up be being around the 100 uF range in a large package.
Regards,
Jon
Hi John,
I will get back to you within 2-3 business days with the ESR value. If such a large COUT is being used, please be sure to use a SS cap to limit the inrush current at start-up. Thanks!
Regards,
Srikanth
Hi John,
We strongly recommend that a ceramic capacitor be used as COUT. However, if a Tantalum Cap has to be used, could you provide us the value/range of VIN, VOUT, ILOAD, Ambient operating temperature and the value & model # of the tantalum COUT you wish to use? This will help us setup the Simulation environment and verify the part stability. Apologies, but this could take us up to a week to verify. Thanks!
Regards,
Srikanth
HI Srikanth,
The Vin=3.75V
Vout=3.3V
ILoad = 600 mA
The proposed Tantalun Cap is F381A106MMA from AVX which is a 10 uF capacitor. I am open to using two in parallel to lower the ESR.
Temp conditions considered up to 105C.
Regards,
Jon
Hi John,
Thank you for the test conditions. I'll try to get back to you by the end of next week. Thanks!
Regards,
Srikanth
Hi John,
Will you using a Bypass capacitor for the load and/or a ferrite bead? If so, could you please provide details of these components as well? Thanks!
Regards,
Srikanth
Hi Srikanth,
Sure, there will be no ferrite beads. There will be approximately 10 uF of ceramic bypass capacitors on the load in after the LDO. This is in addition to the LDO output capacitor.
Jon
Hello John,
This device will not be stable if the ESR of the output capacitor is larger than 20mΩ. The design of this device has been verified to be stable for 1mΩ ≤ ESR ≤ 20mΩ and 50pH ≤ ESL ≤ 600pH. The F38 series of capacitors appear to have much higher ESR's. Thanks!
Regards,
Srikanth