Other Parts Discussed in Thread: TPS54202
When I tested TPS54202EVM today, I found that when Vout=4.628V,Iout=0.8A, the waveform of Vsw is above. I don't understand where I circled out with a red line.
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When I tested TPS54202EVM today, I found that when Vout=4.628V,Iout=0.8A, the waveform of Vsw is above. I don't understand where I circled out with a red line.
Hi Skylar,
For part 1, the platform of negative voltage is caused by the conduction of body diode in Low Side MOSFET in deadtime.
For part 2, the ringing in rising edge is caused by parasitic inductance existing in PCB trace between Vin pin and Cin, which is raised by high di/dt.
For part 3, the ringing in falling edge is caused by parasitic inductance existing in PCB trace between GND pin and GND terminal of PCB. Root cause is the same with part 2.
Hope my analysis could be helpful!
BTW, could you please brief introduce the reason for testing TPS54202EVM? Is this part applied in customer application?
BRs
Zixu
Thank you for answering my question. But sorry that I still have some questions.
1. What does "in Low Side MOSFET in deadtime" mean?
2.I think TPS54202 is a non-synchronous buck circuit(may I am wrong)
Also, I tested TPS54202 just because I recently learned buck circuit and would like to reinforce my knowledge.
Hi Skylar,
1. In order to prevent High side MOSFET and Low side MOSFET conducting at the same time(this could cause overcurrent and make damage to MOSFETs), there would be a period that two MOSFETs would shutdown at the same time. This period is called "deadtime". Body diode is inside power MOSFET which is produced by the technique of manufacture.
2. Yes, tps54202 is synchronous buck converter with ECO mode. Please check its datasheet.
BRs
Zixu