Hello Team,
I'm wondering if OUT pin can be damaged if a voltage is applied while input node is open. For customer application, 28V would be applied to OUT while VCC is open.
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Hi Ella,
There will be possibility of stressing the GATE with OUT pin powered by active source. They can use back-to-back FET configuration in common source topology to avoid such case. Can you share customer schematic to review.
Best Regards,
Rakesh