BQ76PL536A-Q1: Balancing: Why does it not work?

i am currently working on an automotive bms (proprietary) using one single bq76pl536A-q1 (so no north or south facing chips)
I have confirmed that the Gates of the balancing-Resistor-driver-FETs are connected to the balancing outputs of the BQ Chip
I have confirmed that the balancing outputs of the BQ Chip are not shorted to GND, VCC or each other
I have confirmed that by applying 3V3 with regard to any cell's negative (in my case simulated with a stack of powersupplys for convinience) to the output of the BQ via a several kOhm-Resistor the FETs are switching the balancing resistors on and there is current flow
I can confirm that the SPI interface to the BQ Chip is working since I can retrieve cell voltages from the BQ Chip that reflect the current cell voltages closely.
I have not yet managed to get any cells (real or simulated) to balance using the BQs outputs directly.

Starting condition: the BQ Chip initialized and has an address assigned.

Following is what I am doing on the SPI (cyclically repeating, multiple times a second)

Wakeup the BQ Chip from low power mode and set TSx Pin States
Start a conversion of cellvoltages and Temperatures
Read cellvoltages and temperatures
set the CB_TIME Register to 48s (ensure the timer is always running and not preventing balancing)
read the FAULT_STATUS register (check for CRC error)
Set CB_CTRL to 0 (to ensure that when ever any cell is to be balanced there is a zero to non-zero transition and the CB_TIME timer will always reset and never elapse...)
read the FAULT_STATUS register (check for CRC error)
set CB_CTRL to the cells to be balanced
read the FAULT_STATUS register (check for CRC error)
read the DEVICE_STATUS register (check that the CB_TIME timer is in fact running)
read the ALERT_STATUS register (check that there is no alert that may or may not interfere with the balancing)
return the BQ Chip to low power mode

I can confirm that all the commands are in fact send out via SPI
I have checked that they are all formed as correct BQ Communicatiframes.
I can confirm that there are no CRC errors present at any time that the FAULT_STATUS register gets read (ie. the CB_CTRL write commands are send to and understood by the BQ Chip)
I can confirm that the CB_TIME timer is in fact running (CBT bit in DEVICE_STATUS is set)
I can confirm that there is nothing set in the ALERT_STATUS register (apart from the Sleep bit which is to be expected when coming from sleep, yet reseting this bit cyclically did not show any effect in my testing)

By my understanding there should be no way the balancing should not work under these conditions
What am I doing wrong? A Capture of the SPI (Saleae Logic Capture File, encapsulated in a zip) is enclosed.

BQ Balancing Attempts.zip