TPS61022: Loop Instability Query

PS) the green line is showing where ground has a path on the green/rear layer but it's cut off in the image.

Hello, 

Thanks for reaching out. Can you please clarify the specs of your system (Vout, load current and Vin range)? The TPS6012x is a 3V 200mA charge pump device, could you please double check the part number of the device you're using? We're looking forward hearing from you. 

Kind regards,
EM

That's why I wrote TPS61022. ;)

Vout = 5V, load current = 0 - 5A, Vin = 0.7 - 5.15V

Regards, Andrew

Hi Andrew,

The feed forward cap will not limit input voltage or output current. And I think changing resistor divider have no impact on stability.

And more, I have these quesitons:

What the inductor value you use? 

Do you have the instability waveforms? Like VIN VOUT SW node.

Is there a pullup resistor of EN signal? If there is, what's the resistor value?

Does the instability only appeared in IOUT=5mA?

Thanks,

Best Regards,

Nathan

Hi Nathan,

Inductor = Coilcraft XEL 4030 1uH
Pull-up = No, it's driven hard by MCU
Waveforms = I can get them, but I did look at AC analysis of VOUT with the instability where it rises to about 5.6V (hitting the TPS61022's internal limiter) and it was all over the place with no consistent pattern. The nominal draw of the MCU etc is less than 5mA but when some other items are turned on the draw is a bit higher and that's when the ~5.6V was noticed.

With the 330pF feed forward I have since found with the input voltage at 4.6V and a significant amperage draw of 700mA it will only produce about 4.8V at the output. This seems to be quite a voltage drop. I then did an IR inspection and chip looks good. Apart from this voltage drop the stability across the input voltage range seems good.

Hi Andrew,

Thanks for your information. 

As for the VOUT drop problem after adding feed forward cap, you can put a 1kohm resistor in series with the feed forward cap. It will be helpful.

And the instable problem, what do you mean that " AC analysis of VOUT with the instability" ? have you test the phase margin and gain margin? Or if you can provide unstable waveforms, it will be more helpful. Thanks.

Regards,

Nathan

I did surgery on the board inserting 1k as you suggested. The nominal voltage has now increased with minimal load now 5.15v (5v with 330pF, 5.6v with no FF cap).

These are at minimal load, the MCU is powered, some some LED's. Expect it'll be 5mA max.

AC analysis of output is reasonably clean, ignoring the spikes it's about 50mV or so, acceptable.



AC analysis of input ignoring the spikes is similar, say 50mV. 

So one thing first. If you look at the PCB above you can see that the input capacitors have a large trace to pin 1 ground. Although there are big vias it's probably not ideal. However, the datasheet uses exactly the same approach so I'm assuming that is not the problem.

Now for SW. Again I'm only focusing on minimal load for now. As this is VBUS I can accept overshoot to 5.25v.



You can see with the cursor that it's overshooting, at least in the light-load DCM mode. If it seems normal I can move on to higher current draw analysis.

I've done further investigation and it seems the 1k while adding overshoot at very light load has resolved the voltage sag under load. I pulled 1.2A at an input of 4.5v and received 5.04v, which is bang on. 

Hi Andrew,

Could you please measure SW node waveforms in PFM with smaller voltage scale? I think 2V/div may be too big to figure out the 200mV error. Thanks.

And more, I think the layout is fine.

Nathan

This one is roughly 330mA output. It's switching between DCM/CCM.

(This is with 330pF + 1k FF)

Zooming in...



At roughly 660mA it's CCM only...



Zooming in...

Hi Andrew, 

I think the waveforms you show are all fine, and the high level of SW node is also about 5V.

Do you mean this overshooting? This is also normal behavior duo to the body diode voltage drop of high-side FET.

Nathan