TPS54561: Bootstrap Capacitor Selection

HI:

0.1uF is a value to make sure the voltage ripple on the boot capacitor is smaller.  When high side turn on , the drive current will draw from this capaictor.  it is not a caculated result, but the ripple votlage is eqaul to Qgs/Cboot(Qgs is internal mosfet gate charge , CBoot is the boot capacitor value) , from this formular, larger Cboot will make the ripple smaller.

Thanks

Hello Daniel

The 0.1uf bootstrap capacitor used in the TPS54561 circuit example may not be a calculated value, but it does not mean that the capacitance of the bootstrap capacitor can not be calculated. ( For example equation 2 from AN486: High-Side Bootstrap Design Using ISODrivers in Power Delivery Systems. )

I would like to know that for the TPS54561 circuit example (Datasheet Figure 8-1. 5-V Output TPS54561 Design Example), how is the actual minimum bootstrap capacitor calculated, and the calculation formula?

Thanks.

HI

The Formular is still be Qgs/Cboot , and target ripple of Cboot voltage should be smaller than 5% of Vdc of boot capacitor.  but we don't know the Qg value as it is internal mosfet. so we recommend that you can use 0.1uF capacitance as boot cap value. 

Thanks

Hi Danile

Yes, Cboot=Qgs/(5%*Vboot) can be used for the calculation of boot capacitance.

But, I want to know the Vboot and the internal Qgs...

Hi

Vboot is 5V, but we don't have internal fet Qg data. 

Thanks

Hi

If there is no internal mosfet Qg data, how do we know 0.1uf boot capacitance is good here(Figure 8-1. 5-V Output TPS54561 Design Example) ?

HI Kingson:

The silicon validation will test the boot strap voltage. make usre the voltage is keep at 5V in all working condition except the dropout condition.

Hi Daniel

Where can I find the Vboot=5V from the tps54561 datasheet?

HI

We can check EVM boot votlage, and reply to you later.

Thanks

Hi Hongjia

Thanks a lot.

But, with the Qg=3nC and Vboot=5.8V, the min boot capacitance is 3nC/(5%*5.8V)=10.345nF.

The 0.1uF(100nF) in the Figure 8-1. 5-V Output TPS54561 Design Example is a bit too large, am i right?

Hi Daniel

OK, thanks a lot.

Hi Daniel

As shown in the figure below, usually the bootstrap capacitor should contain two processes, charging and discharging, that is, the bootstrap capacitor needs a charge refresh. The bootstrap capacitor voltage should look like Vboot in the figure.

But, If we use too large a capacitor value, the voltage on the bootstrap capacitor tends to DC (look like Vcb(av)) and the charge on the capacitor is no longer refreshed.

What will happen, and does it affect the proper operation of the smps buck converter?

Hi

if charge not happend due to too higher dc, then in next  turn on time still will discharge from boot cap. it will keep happend which made the dc voltage of boot cap drop until the charge can happen.

Changing another way:

10.345nF or 0.1uF is enough for "Figure 8-1. 5-V Output TPS54561 Design Example" from the previous discussion and calculation.

But, if we use 10uF or 47uF boot capacitor, does this cause any issues?

HI 

we dont' recommend use this high value boot cap ,  and can you let me know why you want to use this value capacitor , for what purpose?

HI

Just want to know, if we use too large capacitance, What will happen, and does it affect the proper operation of the smps buck converter?